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MPC8349ECZUAJDB中文資料PowerQUICC, 32 Bit Power Arch SoC, 533MHz, DDR1/2, 2-PCI, 1GbE, USB, SEC, -40 to 105C, Rev 2數(shù)據(jù)手冊恩XP規(guī)格書

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廠商型號

MPC8349ECZUAJDB

功能描述

PowerQUICC, 32 Bit Power Arch SoC, 533MHz, DDR1/2, 2-PCI, 1GbE, USB, SEC, -40 to 105C, Rev 2

制造商

恩XP 恩XP

中文名稱

N智浦

數(shù)據(jù)手冊

下載地址下載地址二

更新時間

2025-9-15 23:01:00

人工找貨

MPC8349ECZUAJDB價格和庫存,歡迎聯(lián)系客服免費人工找貨

MPC8349ECZUAJDB規(guī)格書詳情

描述 Description

The MPC8349E PowerQUICC? II Pro family of integrated communications processors is a next-generation extension of the popular PowerQUICC II line. Based on system-on-chip (SoC) architecture, the MPC8349E PowerQUICC II Pro family integrates the enhanced e300 core and advanced features such as double data rate (DDR) memory, dual Gigabit Ethernet (GbE), dual PCI and high-speed USB controllers. With clock speeds scaling to 667 MHz, the MPC8349E family of processors offers the highest performing PowerQUICC II devices available.
The MPC8349E PowerQUICC II Pro family is designed to provide a cost-effective, highly integrated control processing solution that addresses the emerging needs of networking, communications and pervasive computing applications. MPC8349E processors can be used in applications such as Ethernet routers and switches, wireless LAN (WLAN) equipment, network storage, home network appliances, industrial control equipment, and copiers, printers and other imaging systems.

特性 Features

? e300 core operating from 400 MHz up to 667 MHz (enhanced version of 603e core with larger caches)
? 32-bit, high-performance superscalar core
? 1260 MIPS @ 667 MHz
? Double-precision floating point, integer, load/store, system register, and branch processor units
? 32 KB data and 32 KB instruction cache with line locking support
? DDR1/DDR2 memory controller, up to 333 MHz data rate, with 32- or 64-bit interfaces with ECC
? Dual PCI interfaces
? Dual 10/100/1000 Ethernet controllers
? Embedded security engine
? Dual high-speed USB controllers
? Local bus controller
? Dual UART (DUART)
? Dual I2C interfaces (master or slave mode)
? Four-channel DMA controller
? Serial peripheral interface (SPI)
? General-purpose parallel I/O (GPIO)
? IEEE 1149.1 JTAG test access port
? Package: 672-pin, 35 mm x 35 mm TBGA (1 mm pitch)
? Process technology: 130 nm CMOS
? Voltage: 1.2-volt core voltage with 3.3 and 2.5-volt I/O
? This product is included in NXP?.s product longevity program, with assured supply for a minimum of 10 years after launch

應(yīng)用 Application

Secure Transaction and Retail Payments
?POS Printer

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