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MCM69C232TQ20

4K x 64 CAM

4Kx64CAM TheMCM69C232isaflexiblecontent–addressablememory(CAM)thatcancontain4096entriesof64bitseach.Thewidthsofthematchfieldandtheoutputfieldareprogrammable,andthematchtimeisdesignedtobe160ns.Asaresult,theMCM69C232iswellsuitedfordatacomapplicati

MCM69C232TQ20

4K x 64 3.3V CAM; \n?Content addressable memory for communication applications\n?4K connections\n\n?4096 Entries\n?160 ns Match Time\n?Mask Register to “Don’t Care” Selected Bits\n?Depth Expansion by Cascading Multiple Devices\n?50 MHz Maximum Clock Rate\n?Programmable Match and Output Field Widths\n?Concurrent Matching of Virtual Path Circuits and Virtual Connection\nCircuits in ATM Mode\n?Separate Ports for Control and Match Operations\n?200 ns Insertion Time if 1 of 12 Entry Queue Locations is Empty\n?12 ms Initialization Time After Fast Insertion (at Power–Up Only)\n?Single 3.3 V ±5% Supply\n?IEEE Standard 1149.1 Test Port (JTAG)\n?100–Pin TQFP Package\n;

Overview The MCM69C232 is EOL. See PCN9049. Possible replacement: none.The MCM69C232 is a flexible content–addressable memory (CAM) that can contain 4096 entries of 64 bits each. The widths of the match field and the output field are programmable, and the match time is designed to be 160 ns. As a result, the MCM69C232 is well suited for datacom applications such as Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation in ATM switches up to OC12 (622 Mbps) data rates and Media Access Control (MAC) address lookup in Ethernet/Fast Ethernet bridges. The match duty cycle of the MCM69C232 is user defined, with a trade–off between the time between matches and the rate of new entries added to the CAM.

MCM69C232TQ20R

4K x 64 CAM

4Kx64CAM TheMCM69C232isaflexiblecontent–addressablememory(CAM)thatcancontain4096entriesof64bitseach.Thewidthsofthematchfieldandtheoutputfieldareprogrammable,andthematchtimeisdesignedtobe160ns.Asaresult,theMCM69C232iswellsuitedfordatacomapplicati