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MCF5407AI220

MCF5407 V4CORE 4KSRAM; ? ColdFire? V4 core-delivering up to 316 (Dhrystone 2.1) MIPS @ 220 MHz\n? Harvard memory architecture and branch cache acceleration logic\n? Fully code compatible with V2 and V3 ColdFire cores\n? 16 KB instruction-cache, 8 KB data-cache\n? 4 KB SRAM\n? Multiply-accumulate (MAC) with integer and fractional capabilities\n? Hardware integer divide unit\n? Integrated pheripherals ? DRAM controller: glueless interface to SDRAM or ADRAM\n? Two universal asynchronous receiver/transmitter (UARTS), one that supports synchronous operations\n? Four fully programmable direct memory access (DMA) channels\n? Two 16-bit general-purpose timers\n? I2C module\n? Parallel I/O interface\n? System integration module(SIM)\n? Pin-compatible with MCF5307\n;

The MCF5407 is the first standard microprocessor to implement the ColdFire? V4 core. Increasing the internal speed of the core allows higher performance and provides system designers with an easy-to-use lower speed system interface.\n

恩XP

MCF54418CMJ250

FREESCALESEMICONDUCTOR
FBGA-256

FREESCALESEMICONDUCTOR

MCF54418CMJ250

FREESCALE SEMICONDUCTOR
FBGA-256

FREESCALE SEMICONDUCTOR

MCF5474VR266

TI

MCF5485CVR200

FERRSCALE
NA

FERRSCALE