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MC9S12XA512CAG

S12XA 16-bit MCU, HCS12X core, 512KB Flash, 80MHz, QFP 144; HCS12X Core? 16-bit HCS12X CPU ? Upward compatible with HCS12 instruction set\n? Interrupt stacking and programmer's model identical to HCS12\n? Instruction queue\n? Enhanced indexed addressing\n? Enhanced instruction set\n? EBI (external bus interface)\n? MMC (module mapping control)\n? INT (interrupt controller)\n? DBG (debug module to monitor HCS12X CPU and XGATE bus activity)\n? BDM (background debug mode)\n;

The S12X MCU family retains the cost-effective, power consumption, electromagnetic compatibility and code-size efficiency advantages currently enjoyed by users of the existing 16-bit HCS12 MCU family.\nBased on an enhanced HCS12 core, the S12X family gives you two to five times the performance of a 25 MHz HCS12 while retaining a high degree of pin and code compatibility with the HCS12.\nThe S12X family introduces the performance-boosting XGATE module. Using enhanced DMA functionality, this parallel processing module offloads the CPU by providing high-speed data processing and transfer between peripheral modules, RAM and I/O ports.\n

MC9S12XA512

HCS12XMicrocontrollers

MC9S12XA512

Covers,S12XD,S12XB&S12XAFamilies