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MC9S12A512CPVE

S12A 16-bit MCU, HCS12 core, 512KB Flash, QFP 112; ? 16-bit HCS12 CPU\n? Upward compatible with M68HC11 instruction set\n? Interrupt stacking and programmer's model identical to M68HC11\n? Instruction pipe\n? Enhanced indexed addressing\n? Multiplexed external bus\n? Memory\n? 512 KB flash EEPROM\n? 4 KB EEPROM\n? 14 KB RAM\n? Two asynchronous serial communications interfaces (SCI)\n? Three serial peripheral interfaces (SPI)\n? Two 8-channel ADCs\n? 8-channel pulse-width modulator (PWM)\n? 29 discrete digital I/O channels (Port A, Port B, Port K and Port E)\n? 20 discrete digital I/O lines with interrupt and wake-up capability\n? Inter-IC Bus\n? 10-bit resolution\n? Software-compatible modules\n;

The MC9S12A512 MCU is a 16-bit device composed of standard on-chip peripherals, including a HCS12 CPU.\nSystem resource mapping, clock generation, interrupt control and bus interfacing are managed by the system integration module (SIM).\nThe MC9S12A512 has full 16-bit data paths throughout, however the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems.\nThe inclusion of a phase-lock loop (PLL) circuit allows power consumption and performance to be adjusted.\n

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MC9S12A512

MC9S12DP512DeviceGuideV01.25

MC9S12A512

MicrocontrollerUnit(MCU)

Overview TheMC9S12DP512microcontrollerunit(MCU)isa16-bitdevicecomposedofstandardon-chipperipheralsincludinga16-bitcentralprocessingunit(HCS12CPU),512KbytesofFlashEEPROM,14KbytesofRAM,4KbytesofEEPROM,twoasynchronousserialcommunicationsinterfaces(SCI),thre

MC9S12DG128CFUE

FREESCALE
LQFP64

MC9S12DG256CFUE

NXP
QFP-80

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