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首頁(yè)>MC74VHC1GT00DTT3>規(guī)格書詳情

MC74VHC1GT00DTT3中文資料亞歷電子數(shù)據(jù)手冊(cè)PDF規(guī)格書

MC74VHC1GT00DTT3
廠商型號(hào)

MC74VHC1GT00DTT3

功能描述

2-Input NAND Gate / CMOS Logic Level Shifter with LSTTL-Compatible Inputs

文件大小

577.28 Kbytes

頁(yè)面數(shù)量

4 頁(yè)

生產(chǎn)廠商 E-Tech Electronics LTD
企業(yè)簡(jiǎn)稱

ETL亞歷電子

中文名稱

亞歷電子有限公司

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-7-19 22:59:00

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MC74VHC1GT00DTT3規(guī)格書詳情

The MC74VHC1GT00 is a single gate 2–input NAND fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.

The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply.

The MC74VHC1GT00 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1GT00 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot insertion, etc.

? High Speed: t PD = 3.1 ns (Typ) at V CC = 5 V

? Low Power Dissipation: I CC = 2mA (Max) at T A= 25°C

? TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V

? CMOS–Compatible Outputs: V OH > 0.8 V CC ; V OL < 0.1 V CC @Load

? Power Down Protection Provided on Inputs and Outputs

? Balanced Propagation Delays

? Pin and Function Compatible with Other Standard Logic Families

? Chip Complexity: FETs = 64; Equivalent Gates = 14

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