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首頁(yè)>MC74LVQ573SD>規(guī)格書詳情

MC74LVQ573SD中文資料摩托羅拉數(shù)據(jù)手冊(cè)PDF規(guī)格書

MC74LVQ573SD
廠商型號(hào)

MC74LVQ573SD

功能描述

LOW-VOLTAGE CMOS OCTAL TRANSPARENT LATCH

文件大小

215.98 Kbytes

頁(yè)面數(shù)量

8 頁(yè)

生產(chǎn)廠商 Motorola, Inc
企業(yè)簡(jiǎn)稱

MOTOROLA摩托羅拉

中文名稱

加爾文制造公司官網(wǎng)

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更新時(shí)間

2025-7-25 18:24:00

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MC74LVQ573SD規(guī)格書詳情

Low-Voltage Quiet CMOS Octal Transparent Latch Flow Through Pinout (3-State, Non-Inverting)

The MC74LVQ573 is a high performance, non–inverting octal transparent latch operating from a 2.7 to 3.6V supply. The MC74LVQ573 is suitable for TTL level bus oriented applications where a memory element is required.

The MC74LCX573 contains 8 D–type latches with 3–state standard outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH–to–LOW transition of LE. The 3–state standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are enabled. When OE is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. The LCX573 flow through design facilitates easy PC board layout.

? Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low

Noise Applications

? Guaranteed Simultaneous Switching Noise Level and Dynamic

Threshold Performance

? Guaranteed Skew Specifications

? Guaranteed Incident Wave Switching into 75?

? Low Static Supply Current (10μA) Substantially Reduces System Power

Requirements

? Latchup Performance Exceeds 500mA

? ESD Performance: Human Body Model >2000V

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