描述 Description

The MC74HC367A is identical in pinout to the LS367. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device is arranged into 2-bit and 4-bit sections, each having its own active-low Output Enable. When either of the enables is high, the affected buffer outputs are placed into high-impedance states. The HC367A has noninverting outputs.

特性 Features

? Output Drive Capability: 15 LSTTL Loads
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 2 to 6 V
? Low Input Current: 1 mA
? High Noise Immunity Characteristic of CMOS Devices
? In Compliance with the Requirements Defined by JEDEC Standard No. 7A
? Chip Complexity: 92 FETs or 23 Equivalent Gates

應(yīng)用 Application

? Desktop, White Goods, Industrial, etc

簡(jiǎn)介

MC74HC367A屬于集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由制造生產(chǎn)的MC74HC367A緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對(duì)某個(gè)電路的邏輯信號(hào)的訪問，以用于另一電路。緩沖器將其輸入信號(hào)（不變或反相）傳遞到其輸出，并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。