描述 Description

High-Performance Silicon-Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of four D flip-flops with common Reset and Clock inputs, and separate D inputs. Reset (active-low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D inputis transferred to the corresponding Q output on the next positive going edge of the Clock input.

特性 Features

? Output Drive Capability: 10 LSTTL Loads
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 2 to 6 V
? Low Input Current: 1 mA
? High Noise Immunity Characteristic of CMOS Devices
? In Compliance with the Requirements Defined by JEDEC Standard No. 7A
? Chip Complexity 166 FETs or 41.5 Equivalent Gates
? Pb-Free Packages are Available*

簡(jiǎn)介

MC74HC175A屬于集成電路（IC）的觸發(fā)器。由制造生產(chǎn)的MC74HC175A觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù)，另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對(duì)提供給其輸入的信號(hào)有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。