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首頁(yè)>MC68HRC705JP7CDW>規(guī)格書詳情

MC68HRC705JP7CDW中文資料飛思卡爾數(shù)據(jù)手冊(cè)PDF規(guī)格書

MC68HRC705JP7CDW
廠商型號(hào)

MC68HRC705JP7CDW

功能描述

General Release Specification

文件大小

5.55564 Mbytes

頁(yè)面數(shù)量

230 頁(yè)

生產(chǎn)廠商 Freescale Semiconductor, Inc
企業(yè)簡(jiǎn)稱

FREESCALE飛思卡爾

中文名稱

飛思卡爾半導(dǎo)體官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-7-16 22:50:00

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MC68HRC705JP7CDW規(guī)格書詳情

Introduction

The Motorola MC68HC705JJ7 and MC68HC705JP7 are EPROM versions of the MC68HC05JJ/JP Family of microcontrollers.

Features

? Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)

? 6160 Bytes of User EPROM (Including 16 Bytes of User Vectors)

? 224 Bytes of Low-Power User RAM (4 Transistors)

? 64 Bits of Personality EPROM (Serial Access)

? 16-Bit Programmable Timer with Input Capture and Output Compare

? 15-Stage Core Timer Including 8-Bit Free-Running Counter and 4-Stage Selectable Real-Time Interrupt Generator

? Simple Serial Input/Output Port (SIOP) with Interrupt Capability

? Two Voltage Comparators, One of Which Can be Combined with the 16-Bit Programmable Timer to Create a 4-Channel, SingleSlope A/D Converter

? Output of Voltage Comparator Can Drive Port Pin PB4 Directly Under Software Control

? 14 I/O Lines (MC68HC705JJ7) or 22 I/O Lines (MC68HC705JP7) Including High-Source/Sink Current Capability on 6 I/O Pins (MC68HC705JJ7) or 14 I/O Pins (MC68HC705JP7)

? Programmable 8-Bit Mask Option Register (MOR) to Select Mask Options Found in ROM-Based Versions

? MOR Selectable Software Programmable Pulldowns on All I/O Pins and Keyboard Scan Interrupt on Four I/O Pins

? Software Mask and Request Bit for IRQ Interrupt with MOR Selectable Sensitivity on IRQ Interrupt (Edge- and Level-Sensitive or Edge-Only)

? On-Chip Oscillator with Device Option of Crystal/Ceramic Resonator or RC Operation and MOR Selectable Shunt Resistor, Approximately 2 M?

? Internal Oscillator for Lower-Power Operation, Approximately 100 kHz (500 kHz Selected as Device Option)

? EPROM Security Bit1 to Aid in Locking Out Access to Programmable EPROM array

? MOR Selectable (COP) Watchdog System

? Power-Saving Stop and Wait Mode Instructions (MOR Selectable STOP Conversion to Halt and Option for Fast 16-Cycle Restart, and Power-On Reset)

? On-Chip Temperature Measurement Diode

? MOR Selectable Low-Voltage Inhibit to Reset CPU in Low-Voltage Conditions

? Illegal Address Reset

? Internal Steering Diode and Pullup Device on RESET Pin to VDD

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MOT
23+
NA
12000
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Freesca
24+
SO-16
80000
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ON/安森美
22+
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100000
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MOTOROLA
01+
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1117
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6523
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FREESCALE
23+
NA
19960
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MOT
23+
NA
13650
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ON/安森美
21+
SOP20
30000
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IC
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2960
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MOT
9847
38
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