Introduction

The MC68HC908QY4 is a member of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs). The M68HC08 Family is a Complex Instruction Set Computer (CISC) with a Von Neumann architecture. All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.

Features

Features include:

? High-performance M68HC08 CPU core

? Fully upward-compatible object code with M68HC05 Family

? 5-V and 3-V operating voltages (VDD)

? 8-MHz internal bus operation at 5 V, 4-MHz at 3 V

? Trimmable internal oscillator

– 3.2 MHz internal bus operation

– 8-bit trim capability

– ± 25 untrimmed

– ± 5 trimmed

? Auto wake-up from STOP capability

? Configuration (CONFIG) register for MCU configuration options, including:

– Low-voltage inhibit (LVI) trip point

? In-system FLASH programming

? FLASH security(1)

? On-chip in-application programmable FLASH memory (with

internal program/erase voltage generation)

– MC68HC908QY4 and MC68HC908QT4 —4096 bytes

– MC68HC908QY2, MC68HC908QY1, MC68HC908QT2, and MC68HC908QT1 —1536 bytes

? 128 bytes of on-chip random-access memory (RAM)

? 2-channel, 16-bit timer interface module (TIM)

? 4-channel, 8-bit analog-to-digital converter (ADC) on MC68HC908QY2, MC68HC908QY4, MC68HC908QT2, and MC68HC908QT4

? 5 or 13 bidirectional input/output (I/O) lines and one input only:

– Six shared with keyboard interrupt function and ADC

– Two shared with timer channels

– One shared with external interrupt (IRQ)

– Eight extra I/O lines on 16-pin package only

– High current sink/source capability on all port pins

– Selectable pullups on all ports, selectable on an individual bit basis

– Three-state ability on all port pins

? 6-bit keyboard interrupt with wakeup feature (KBI)

? Low-voltage inhibit (LVI) module features:

– Software selectable trip point in CONFIG register

? System protection features:

– Computer operating properly (COP) watchdog

– Low-voltage detection with reset

– Illegal opcode detection with reset

– Illegal address detection with reset

? External asynchronous interrupt pin with internal pullup (IRQ) shared with general-purpose input pin

? Master asynchronous reset pin (RST) shared with general-purpose input/output (I/O) pin

? Power-on reset

? Internal pullups on IRQand RSTto reduce external components

? Memory mapped I/O registers

? Power saving stop and wait modes

? MC68HC908QY4, MC68HC908QY2, and MC68HC908QY1 are available in these packages:

– 16-pin plastic dual in-line package (PDIP)

– 16-pin small outline integrated circuit (SOIC) package

– 16-pin thin shrink small outline package (TSSOP)

? MC68HC908QT4, MC68HC908QT2, and MC68HC908QT1 are available in these packages:

– 8-pin PDIP

– 8-pin SOIC