The MC14554B 2 x 2–bit parallel binary multiplier is constructed with complementary MOS (CMOS) enhancement mode devices. The multiplier can perform the multiplication of two binary numbers and simultaneously add two other binary numbers to the product. The MC14554B has two multiplicand inputs (X0 and X1), two multiplier inputs (Y0 and Y1), five cascading or adding inputs (K0, K1, M0, M1, and M2), and five sum and carry outputs (S0, S1, S2, C1 [S3], and C0). The basic multiplier can be expanded into a straightforward m–bit by n–bit parallel multiplier without additional logic elements.

? Diode Protection on All Inputs

? All Outputs Buffered

? Straight–forward m–Bit By n–Bit Expansion

? No Additional Logic Elements Needed for Expansion

? Multiplies and Adds Simultaneously

? Positive Logic Design

? Supply Voltage Range = 3.0 Vdc to 18 Vdc

? Capable of Driving Two Low–Power TTL Loads or One Low–Power Schottky TTL Load Over the Rated Temperature Range