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MC14042BFR2中文資料安森美半導體數(shù)據(jù)手冊PDF規(guī)格書
MC14042BFR2規(guī)格書詳情
The MC14042B Quad Transparent Latch is constructed with MOS P?channel and N?channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can be reversed using the polarity input. Information present at the data input is transferred to outputs Q and Q during the clock level which is determined by the polarity input. When the polarity input is in the logic “0” state, data is transferred during the low clock level, and when the polarity input is in the logic “1” state the transfer occurs during the high clock level.
Features
? Buffered Data Inputs
? Common Clock
? Clock Polarity Control
? Q and Q Outputs
? Double Diode Input Protection
? Supply Voltage Range = 3.0 Vdc to 1 8 Vdc
? Capable of Driving Two Low?power TTL Loads or One Low?power
Schottky TTL Load Over the Rated Temperature Range
? Pb?Free Packages are Available*
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
MOT |
23+ |
DIP-16P |
8650 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
MOTOROLA/摩托羅拉 |
23+ |
DIP16 |
18000 |
全新原裝現(xiàn)貨,假一賠十 |
詢價 | ||
MOTOROLA/摩托羅拉 |
22+ |
CDIP |
12245 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價 | ||
MOT |
9330+ |
DIP-16P |
2683 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
MOT |
24+ |
DIP16 |
6800 |
絕對原裝!真實庫存! |
詢價 | ||
ON/安森美 |
23+ |
DIP |
13000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種 |
詢價 | ||
MOT |
24+ |
CDIP16 |
3629 |
原裝優(yōu)勢!房間現(xiàn)貨!歡迎來電! |
詢價 | ||
MOT |
23+ |
DIP-16P |
12800 |
公司只有原裝 歡迎來電咨詢。 |
詢價 | ||
MOT |
23+ |
DIP16 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
MOTOROLA/摩托羅拉 |
23+ |
DIP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 |