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MB90F823BPMC中文資料富士通數(shù)據(jù)手冊PDF規(guī)格書

MB90F823BPMC
廠商型號

MB90F823BPMC

功能描述

16-bit Microcontroller

文件大小

1.65425 Mbytes

頁面數(shù)量

56

生產(chǎn)廠商 Fujitsu Component Limited.
企業(yè)簡稱

FUJITSU富士通

中文名稱

富士通株式會社官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-2 23:00:00

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MB90F823BPMC規(guī)格書詳情

■ DESCRIPTION

The MB90820B series is a line of general-purpose, Fujitsu 16-bit microcontrollers designed for process control applications which require high-speed real-time processing, such as consumer products.

While inheriting the AT architecture of the F2MC family, the instruction set for the F2MC-16LX CPU core of the MB90820B series incorporates additional instructions for high-level languages, supports extended addressing modes, and contains enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation instructions. In addition, the MB90820B series has an on-chip 32-bit accumulator which enables processing of long-word data.

The peripheral resources integrated in the MB90820B series include : an 8/10-bit A/D converter, 8-bit D/A converters, UARTs (SCI) 0, 1, multi-functional timer (16-bit free-run timer, input capture units (ICUs) 0 to 3, output compare units (OCUs) 0 to 5, 16-bit PPG timer 0, waveform generator), 16-bit PPG timer 1, 2, PWC 0, 1, 16-bit reload timer 0, 1 and DTP/external interrupt.

■ FEATURES

? Minimum execution time of instruction : 42 ns / 4 MHz oscillation (uses PLL clock multiplication) maximum multiplier = 6

? Maximum memory space 16 M bytes, Linear/bank access

? Instruction set optimized for controller applications

Supported data types : bit, byte, word, and long-word types

Standard addressing modes : 23 types

32-bit accumulator enhancing high-precision operations

Signed multiplication/division instructions and enhanced RETI instructions

? Enhanced high level language (C) and multi-tasking support instructions

Use of a system stack pointer

Symmetrical instruction set and barrel shift instructions

? Program patch function (for two address pointers)

? Increased execution speed : 4-byte instruction queue

? Powerful interrupt function

Up to eight priority levels programmable

External interrupt inputs : 8 channels

? Automatic data transmission function independent of CPU operation

Up to 16 channels for the extended intelligent I/O service

DTP request inputs : 8 channels

? Internal ROM

Flash memory : 64 K/128 K bytes with flash security

MASK ROM : 64 K/128 K bytes

? Internal RAM

Evaluation product : 16 K bytes

Flash memory : 4 K/8 K bytes

MASK ROM : 4 K bytes

? General-purpose ports

Up to 66 channels (ports where pull-up resistor can be configured : 32 channels)

? A/D Converter (RC) : 16 channels

8/10-bit resolution selectable

Conversion time : Min 3 μs (24 MHz operation, including sampling time)

? 8-bit D/A Converter : 2 channels

? UART : 2 channels

? 16-bit PPG timer : 3 channels

Mode switching function provided (PWM mode or one-shot mode)

ch.0 can be worked with multi-functional timer or independently

? 16-bit reload timer : 2 channels

? 16-bit PWC timer : 2 channels

? Clock supervisor

? Multi-functional timer

Input capture : 4 channels

Output compare with selectable buffer : 6 channels

Free-run timer with up or up-down mode selection and selectable buffer: 1 channel

16-bit PPG timer : 1 channel

Waveform generator : (16-bit timer : 3 channels, 3-phase waveform or dead time)

? Time-base timer/watchdog timer : 18-bit

? Low-power consumption mode :

Sleep mode

Stop mode

CPU intermittent operation mode

? Package :

LQFP-80 (FPT-80P-M21 : 0.50 mm pitch)

LQFP-80 (FPT-80P-M22 : 0.65 mm pitch)

QFP-80 (FPT-80P-M06 : 0.80 mm pitch)

? CMOS technology

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24+
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