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MAX510

Quad, Serial 8-Bit DACs with Rail-to-Rail Outputs

GeneralDescription TheMAX509/MAX510arequad,serial-input,8-bitvoltage-outputdigital-to-analogconverters(DACs).Theyoperatewithasingle+5Vsupplyordual±5Vsupplies.Internal,precisionbuffersswingrail-to-rail.Thereferenceinputrangeincludesbothsupplyrails. Features ?Si

MAX510

四路、串行、8位DAC，滿擺幅輸出; ? +5V單電源或±5V雙電源供電\n\n? 輸出緩沖放大器提供軌到軌擺幅\n\n? 基準輸入范圍包括兩個供電軌\n\n? 經(jīng)過校準的失調、增益和線性度(1 LSB TUE)\n\n? 10MHz串行接口，與SPI、QSPI (CPOL = CPHA = 0)和Microwire兼容\n\n? 雙緩沖寄存器支持同步更新\n\n? 用于菊花鏈連接的串行數(shù)據(jù)輸出\n\n? 上電復位可將串行接口清零并將所有寄存器設置為零;

MAX509/MAX510均為四通道、串行輸入、8位電壓輸出數(shù)模轉換器(DAC)。它們采用+5V單電源或±5V雙電源供電。內部精密緩沖器提供軌到軌擺幅?；鶞瘦斎敕秶▋蓚€供電軌。\n\n MAX509具有四個獨立的基準輸入，便于獨立設置每個DAC的滿量程范圍。采用20引腳DIP、SSOP和SO封裝。除了具有兩個基準輸入、每個輸入由兩個DAC共享外，MAX510與MAX509完全相同。MAX510采用節(jié)省空間的16引腳DIP和SO封裝。\n\n 串行接口采用雙緩沖：12位輸入移位寄存器后接四個8位緩沖寄存器和四個8位DAC寄存器。12位串行字用于將數(shù)據(jù)加載到每個寄存器中。輸入和DAC寄存器都可以通過單個軟件命令進行獨立更新或同時更新。兩個額外的異步控制引腳用于同步更新（低電平有效LDAC）輸入和DAC寄存器或將其清零（低電平有效CLR）。\n\n 該接口與Microwire?和SPI?/QSPI?兼容。所有數(shù)字輸入和輸出均兼容TTL/CMOS。緩沖數(shù)據(jù)輸出用于回讀串行器件或進行菊花鏈連接。\n\n ?\n\n

MAX5100

2.7V to 5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5100parallel-input,voltage-output,quad8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving20-pinTSSOPpackage.InternalprecisionbuffersswingRail-to-Rail?,andthereferenceinputrangeincludesbothg

MAX5100AEUP

2.7V to 5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5100parallel-input,voltage-output,quad8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving20-pinTSSOPpackage.InternalprecisionbuffersswingRail-to-Rail?,andthereferenceinputrangeincludesbothg

MAX5100BEUP

2.7V to 5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5100parallel-input,voltage-output,quad8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving20-pinTSSOPpackage.InternalprecisionbuffersswingRail-to-Rail?,andthereferenceinputrangeincludesbothg

MAX5101

2.7V to 5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5101parallel-input,voltage-output,triple8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving16-pinTSSOPpackage.Internalprecisionbuffersswingrail-to-rail.ForallthreeDACs,theinternalreferencev

MAX5101AEUE

2.7V to 5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5101parallel-input,voltage-output,triple8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving16-pinTSSOPpackage.Internalprecisionbuffersswingrail-to-rail.ForallthreeDACs,theinternalreferencev

MAX5101BEUE

2.7V to 5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5101parallel-input,voltage-output,triple8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving16-pinTSSOPpackage.Internalprecisionbuffersswingrail-to-rail.ForallthreeDACs,theinternalreferencev

MAX5102

2.7V to 5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

GeneralDescription TheMAX5102parallel-input,voltage-output,dual8-bitdigital-to-analogconverter(DAC)operatesfromasingle+2.7Vto+5.5Vsupplyandcomesinaspace-saving16-pinTSSOPpackage.InternalprecisionbuffersswingRail-to-Rail?,andthereferenceinputrangeincludesbothg

MAX5102

+2.7V至+5.5V、低功耗、雙路、并行8位DAC，滿擺幅電壓輸出; ? +2.7V至+5.5V單電源供電\n\n? 超低電源電流\n? 工作時為0.2mA\n\n? 關斷模式下為1nA\n\n\n\n\n? 超小型16引腳TSSOP封裝\n\n? 地至VDD基準輸入范圍\n\n? 輸出緩沖放大器提供軌到軌擺幅\n\n? 上電復位可將所有寄存器設置為零;

MAX5102并行輸入、電壓輸出、雙通道8位數(shù)模轉換器(DAC)采用+2.7V至+5.5V單電源供電，采用節(jié)省空間的16引腳TSSOP封裝。內部精密緩沖器提供軌到軌擺幅，基準輸入范圍包括接地和正供電軌。兩個DAC共享同一個基準輸入。MAX5102的每個DAC均具有獨立的輸入鎖存器。數(shù)據(jù)從一個共用的8位輸入端口傳輸?shù)捷斎腈i存器。這些DAC通過地址輸入A0單獨選擇，并通過將低電平有效WR拉低來更新。MAX5102具有關斷模式以及上電復位模式，前者可將電流降至1nA，后者可在上電時將所有寄存器復位為十六進制代碼00。\n\n ?\n\n