M48T86屬于集成電路（IC）的實(shí)時(shí)時(shí)鐘。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M48T86實(shí)時(shí)時(shí)鐘實(shí)時(shí)時(shí)鐘 (RTC) 為幾乎所有需要保持精確時(shí)間的電子設(shè)備提供時(shí)間和/或日期信息。時(shí)鐘類型有二進(jìn)制計(jì)數(shù)器、時(shí)鐘/日歷/監(jiān)控器、歷時(shí)計(jì)時(shí)器、幻時(shí)鐘芯片、便攜式系統(tǒng)控制器、溫度記錄器、時(shí)間事件記錄器和計(jì)時(shí)器時(shí)鐘外設(shè)。其包含 2 B 至 2 MB 不等的存儲(chǔ)器，接口選項(xiàng)有 I2C、并行、串行、SPI、1 線式、2 線式、3 線式和 4 線式。

描述 Description

The M48T86 is an industry standard real-time clock (RTC). The M48T86 is composed of a lithium energy source, quartz crystal, write protection circuitry, and a 128-byte RAM array.

This provides the user with a complete subsystem packaged in either a 24-pin DIP CAPHAT? or 28-pin SNAPHAT? SOIC. Functions available to the user include a nonvolatile time-of-day clock, alarm interrupts, a one-hundred-year clock with programmable interrupts, square wave output, and 128 bytes of non-volatile static RAM.

The 24-pin, 600 mil DIP CAPHAT houses the M48T86 silicon with a quartz crystal and a long-life lithium button cell in a single package.

The 28-pin, 330 mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT? housing containing the battery and crystal. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process.

Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion.

The SOIC and battery packages are shipped separately in plastic anti-static tubes or in tape & reel form.

For the 28-lead SOIC, the battery/crystal package part number is “M4T28-BR12SH” (see Table 20 on page 33).

特性 Features

■ Drop-in replacement for PC computer clock/calendar

■ Counts seconds, minutes, hours, days, day of the week, date, month, and year with leap year compensation

■ Clock accuracy better than ±1 minute per month

■ Interfaced with software as 128 RAM locations:

– 14 bytes of clock and control registers

– 114 bytes of general purpose RAM

■ Selectable bus timing (Intel/Motorola)

■ Three interrupts are separately software maskable and testable

– Time-of-day alarm (once/second to once/day)

– Periodic rates from 122 μs to 500 ms

– End-of-clock update cycle

■ Programmable square wave output

■ 10 years of data retention and clock operation in the absence of power

■ Self-contained battery and crystal in the CAPHAT? DIP package

■ Packaging includes a 28-lead SOIC and SNAPHAT? top (to be ordered separately)

■ SOIC package provides direct connection for a SNAPHAT top contains the battery and crystal

■ Pin and function compatible with bq3285/7A and DS12887

■ RoHS compliant

– Lead-free second level interconnect