M41T56C64MY6F屬于集成電路（IC）的實時時鐘。由意法半導(dǎo)體集團制造生產(chǎn)的M41T56C64MY6F實時時鐘實時時鐘 (RTC) 為幾乎所有需要保持精確時間的電子設(shè)備提供時間和/或日期信息。時鐘類型有二進制計數(shù)器、時鐘/日歷/監(jiān)控器、歷時計時器、幻時鐘芯片、便攜式系統(tǒng)控制器、溫度記錄器、時間事件記錄器和計時器時鐘外設(shè)。其包含 2 B 至 2 MB 不等的存儲器，接口選項有 I2C、并行、串行、SPI、1 線式、2 線式、3 線式和 4 線式。

Summary description

The M41T56C64 is a low power, Serial Real Time Clock with 56 bytes of NVRAM plus a 64Kb EEPROM (see Figure 3). A built-in 32,768Hz oscillator (crystal controlled) and the first 8 bytes of the RAM are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and data are transferred serially via a two-line, bidirectional bus. The built-in address register is incremented automatically after each WRITE or READ data byte.

The M41T56C64 clock has a built-in power sense circuit which detects power failures and automatically switches to the battery supply during power failures. The energy needed to sustain the RAM and clock operations can be supplied from a small lithium coin cell.

Typical data retention time for the Serial RTC is in excess of 10 years with a 50mAh, 3V lithium cell. The M41T56C64 is supplied in an 18-lead Plastic SOIC package.

Feature summary

■ 5V ±10 supply voltage

■ I2C bus compatible

■ Operating temperature of –40 to 85°C

■ Packaging includes:

– 18-lead SOIC (with embedded crystal)

■ RoHS compliant

Serial RTC features

■ Counters for seconds, minutes, hours, day, date, month, years, and century

■ Embedded crystal package

■ Software clock calibration

■ Automatic power-fail detect and switch circuitry

■ 56 bytes of general purpose SRAM

■ Ultra-low battery supply current of 450nA

■ Automatic leap year compensation

■ Special software programmable output

■ Two-wire I2C serial interface supports 100kHz protocol

Serial EEPROM features

■ 8192 bytes of general purpose EEPROM (more than 1e6 erase/write cycles)

■ Two-wire I2C serial interface supports 400kHz protocol

■ Byte and page write (up to 32 bytes)

■ More than 40 year data retention

■ Self-timed programming cycle