描述 Description

The M24M02E-F is a 2-Mbit I2C-compatible EEPROM (electrically erasable programmable memory) organized as 256 K x 8 bits. The device can operate with a supply voltage from 1.6 V to 5.5 V with a clock frequency of 1?MHz (or less), over an ambient temperature range of -40?°C / +85?°C.

The M24M02E-F offers three 8-bit registers. The device type identifier (DTI) register permanently locked in read-only mode. The configurable device address (CDA) register authorizing the user, through software, to configure up to two possibilities of chip enable address. The software write protection (SWP) register authorizing the user, through software, to write protect partial or full memory array.

Moreover, the M24M02E-F offers an additional page, named the identification page (256-byte). The identification page can be used to store sensitive application parameters which can be (later) permanently locked in read-only mode.

The M24M02E-F is available in the standard 8-pin TSSOP8, SO8N, UFDFPN8 and in wafer level chip scale packaging (WLCSP) 5-ball with the WC pin.

On demand, the EEPROM can be delivered by STMicroelectronics with a preprogrammed and locked device address.

特性 Features

? I2C interface
?Compatible with the following I2C bus modes:
? 1 MHz (fast mode plus)
? 400?kHz (fast mode)
? 100?kHz (standard mode)

? 內(nèi)存
?2-Mbit (256-Kbyte) of EEPROM
?Page size: 256-byte
?Additional 256-byte identification page
? Power supply
?Wide voltage range: From 1.6 V to 5.5 V
? Temperature
?Operating temperature range: From -40 °C up to +85 °C
? Fast write cycle time
?Byte and page write within 4 ms (3.3 ms typical)
? Performance
?Enhanced ESD/latch-up protection
?More than 4 million write cycles
?More than 200-year data retention
?Fast wake-up time (less than 5μs)
? Ultralow power current consumption
?350 nA (typical) in Standby mode
?100 μA (typical) for read current
?500 μA (typical) for write current
? Advanced features
?Configurable device address register
?Device type identifier register (in read-only)
?Preprogrammed device address
?Software write protection register
?Hardware write protection of the whole memory array
?Random and sequential read modes
? 包
?SO8N, TSSOP8, and UFDFPN8 (ECOPACK2)
?WLCSP5 5-ball