LTM8060屬于電源-板安裝的直流轉(zhuǎn)換器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的LTM8060直流轉(zhuǎn)換器一種旨在將直流電壓輸入電平改變?yōu)橐粋€(gè)或多個(gè)不同的直流電壓輸出電平的裝置。

FEATURES

?Package-Level EMI Shielding

?Minimize Near-Field Electric Field Noise

?Reduce Near-Field Magnetic Field Noise

?Pin-to-Pin Compatible with the LTM8060

?Four Complete 3A (4A peak) Step-Down SwitchingPower Supplies

?Low Noise Silent Switcher Architecture

?Compliant with CISPR22 Class B/CISPR25 Class 5

?Wide Input Voltage Range: 3V to 40V

?Wide Output Voltage Range: 0.8V to 8V

?4A Continuous Output Current per Channel at 12VIN,3.3VOUT, fSW = 2MHz, TA = 60°C

?Multiphase or Multi-module Parallelable forIncreased Output Current

?Low Thermal Resistance, θJA = 8.4°C/W,θJCtop = 4.6°C/W, θJCbot = 1°C/W

?Selectable Switching Frequency: 200kHz to 3MHz

?Available in a Compact 165-Pin, 16mm × 11.9mm ×2.9mm, Pre-Soldered Grid Array (PSGA) Package

APPLICATIONS

?Automated Test Equipment

?Industrial Supplies

?Medical Equipment

GENERAL DESCRIPTION

The LTM8060F is a quad 40VIN, 3A (4A peak) step-down Silent Switcher? power μModule? (micromodule) regulator with package-level Electromagnetic interference (EMI) shield. The package-level EMI shield enables the Faraday cage to be applied directly to the LTM8060F package, and the EMI shield is electrically connected to the GND pins, providing a compact and effective near-field EMI reduction. The EMI shield eliminates all electric field noise, and a 10dB reduction is achieved on magnetic field noise. The Silent Switcher architecture minimizes EMI while delivering high efficiency.

Included in the package are the controllers, the power switches, the inductors, and the support components. Operating over a wide input voltage range, the LTM8060F supports output voltages from 0.8V to 8V and a switching frequency range of 200kHz to 3MHz, each set by a single resistor. Only the bulk input and the output filter capacitors are needed to finish the design. The LTM8060F outputs can be paralleled in an array for up to 12A (16A peak) capability (see Figure 1).