最新无码a∨在线观看,一本av高清一区二区三区,亚洲熟妇色l20p,宅男噜噜69av,中出あ人妻熟女中文字幕

首頁>LMK04828-EP_V01>規(guī)格書詳情

LMK04828-EP_V01中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

LMK04828-EP_V01
廠商型號

LMK04828-EP_V01

功能描述

LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner

文件大小

1.76875 Mbytes

頁面數(shù)量

102

生產(chǎn)廠商

TI

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-8-7 16:39:00

人工找貨

LMK04828-EP_V01價格和庫存,歡迎聯(lián)系客服免費人工找貨

LMK04828-EP_V01規(guī)格書詳情

1 Features

1? EP Features

– Gold Bondwires

– Temperature Range: –55 to +105 °C

– Lead Finish SnPb

? Maximum Distribution Frequency: 3.2 GHz

? JESD204B Support

? Ultra-Low RMS Jitter

– 88-fs RMS Jitter (12 kHz to 20 MHz)

– 91-fs RMS Jitter (100 Hz to 20 MHz)

– –162.5 dBc/Hz Noise Floor at 245.76 MHz

? Up to 14 Differential Device Clocks From PLL2

– Up to 7 SYSREF Clocks

– Maximum Clock Output Frequency 3.2 GHz

– LVPECL, LVDS, HSDS, LCPECL

Programmable Outputs From PLL2

? Up to 1 Buffered VCXO/Crystal Output From PLL1

– LVPECL, LVDS, 2xLVCMOS Programmable

? Multi-Mode: Dual PLL, Single PLL, and Clock

Distribution

? Dual Loop PLLatinum? PLL Architecture

? PLL1

– Up to 3 Redundant Input Clocks

– Automatic and Manual Switchover Modes

– Hitless Switching and LOS

– Integrated Low-Noise Crystal Oscillator Circuit

– Holdover Mode When Input Clocks are Lost

? PLL2

– Normalized [1 Hz] PLL Noise Floor of

–227 dBc/Hz

– Phase Detector Rate up to 155 MHz

– OSCin Frequency-Doubler

– Two Integrated Low-Noise VCOs

? 50 Duty Cycle Output Divides, 1 to 32

(Even and Odd)

? Precision Digital Delay, Dynamically Adjustable

? 25-ps Step Analog Delay

? 3.15-V to 3.45-V Operation

? Package: 64-Pin WQFN (9.0 mm × 9.0 mm × 0.8

mm)

2 Applications

? Wireless Infrastructure

? Data Converter Clocking

? Networking, SONET/SDH, DSLAM

? Medical / Video / Military / Aerospace

? Test and Measurement

3 Description

The LMK04828-EP device is the industry's highest

performance clock conditioner with JESD204B

support.

The 14 clock outputs from PLL2 can be configured to

drive seven JESD204B converters or other logic

devices using device and SYSREF clocks. SYSREF

can be provided using both DC and AC coupling. Not

limited to JESD204B applications, each of the 14

outputs can be individually configured as highperformance

outputs for traditional clocking systems.

The high performance combined with features like the

ability to trade off between power or performance,

dual VCOs, dynamic digital delay, holdover, and

glitchless analog delay make the LMK04828-EP ideal

for providing flexible high-performance clocking trees.

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
TI
16+
WQFN
10000
原裝正品
詢價
TI
23+
WQFN
3200
正規(guī)渠道,只有原裝!
詢價
TI
三年內(nèi)
1983
只做原裝正品
詢價
TI/德州儀器
23+
13000
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種
詢價
TI
23+
NA
20000
詢價
TexasInstruments
24+
SMD
15600
時鐘合成器/抖動清除器
詢價
TI/德州儀器
2450+
QFN
8850
只做原裝正品假一賠十為客戶做到零風(fēng)險!!
詢價
TI
22+
64WQFN
9000
原廠渠道,現(xiàn)貨配單
詢價
TI/德州儀器
24+
WQFN-64
9600
原裝現(xiàn)貨,優(yōu)勢供應(yīng),支持實單!
詢價
TI/德州儀器
23+
WQFN64
9990
只有原裝
詢價