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KM48L16031BT-GLZSLASHYSLASH0中文資料三星數(shù)據(jù)手冊PDF規(guī)格書
KM48L16031BT-GLZSLASHYSLASH0規(guī)格書詳情
特性 Features
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? DLL aligns DQ and DQS transition with CK transition
? MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
? Data I/O transactions on both edges of data strobe
? Edge aligned data output, center aligned data input
? LDM,UDM/DM for write masking only
? Auto & Self refresh
? 15.6us refresh interval(4K/64ms refresh)
? Maximum burst refresh cycle : 8
? 66pin TSOP II package
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
SAMSUNG/三星 |
54TSOP |
22+ |
6000 |
十年配單,只做原裝 |
詢價 | ||
SAMSUNG |
24+ |
TSSOP |
486 |
詢價 | |||
SAMSUNG |
20+ |
54TSOP |
11520 |
特價全新原裝公司現(xiàn)貨 |
詢價 | ||
SAMSUNG |
25+23+ |
54TSOP |
24201 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價 | ||
SAMSUNG/三星 |
23+ |
TSSOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
SAMSUNG/三星 |
24+ |
NA/ |
20 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價 | ||
SAMSUNG |
2023+ |
TSOP-44 |
50000 |
原裝現(xiàn)貨 |
詢價 | ||
SAMSUNG |
23+ |
TSOP54 |
20000 |
全新原裝假一賠十 |
詢價 | ||
SAMSUNG |
23+ |
54TSOP |
984 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
SAMSUNG/三星 |
22+ |
54TSOP |
25000 |
只做原裝進(jìn)口現(xiàn)貨,專注配單 |
詢價 |
