首頁>K4H281638B-TCA2>規(guī)格書詳情
K4H281638B-TCA2中文資料三星數(shù)據(jù)手冊PDF規(guī)格書
相關芯片規(guī)格書
更多K4H281638B-TCA2規(guī)格書詳情
特性 Features
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? DLL aligns DQ and DQS transition with CK transition
? MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
? Data I/O transactions on both edges of data strobe
? Edge aligned data output, center aligned data input
? LDM,UDM/DM for write masking only
? Auto & Self refresh
? 15.6us refresh interval(4K/64ms refresh)
? Maximum burst refresh cycle : 8
? 66pin TSOP II package
產品屬性
- 型號:
K4H281638B-TCA2
- 制造商:
SAMSUNG
- 制造商全稱:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
SAMSUNG/三星 |
24+ |
NA/ |
4730 |
原裝現(xiàn)貨,當天可交貨,原型號開票 |
詢價 | ||
SAMSUNG |
24+ |
TSOP |
6000 |
只做自己庫存 全新原裝進口正品假一賠百 可開13%增 |
詢價 | ||
SAMSUNG |
2023+ |
TSOP |
50000 |
原裝現(xiàn)貨 |
詢價 | ||
SAMSUNG |
24+ |
TSSOP |
20000 |
全新原廠原裝,進口正品現(xiàn)貨,正規(guī)渠道可含稅!! |
詢價 | ||
SAMS |
23+ |
TSOP66 |
6000 |
專業(yè)配單保證原裝正品假一罰十 |
詢價 | ||
SAMSUNG/三星 |
22+ |
TSOP |
12032 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價 | ||
SAMSUNG |
25+23+ |
TSOP |
25678 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
詢價 | ||
SAMSUNG |
22+ |
TSOP66 |
8000 |
原裝正品支持實單 |
詢價 | ||
SAMSUNG |
24+ |
SOP |
2789 |
原裝優(yōu)勢!絕對公司現(xiàn)貨! |
詢價 | ||
SEC |
65 |
公司優(yōu)勢庫存 熱賣中!! |
詢價 |