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ISPLSI2096E數(shù)據(jù)手冊(cè)Lattice中文資料規(guī)格書

廠商型號(hào) |
ISPLSI2096E |
功能描述 | In-System Programmable SuperFAST High Density PLD |
制造商 | Lattice Lattice Semiconductor |
中文名稱 | 萊迪思 萊迪思半導(dǎo)體公司 |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-9 20:00:00 |
人工找貨 | ISPLSI2096E價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
ISPLSI2096E規(guī)格書詳情
描述 Description
The ispLSI 2096E is a High Density Programmable Logic Device. The device contains 96 Registers, 96 Universal I/O pins, six Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2096E features 5V in-system programmability and in-system diagnostic capabilities. The ispLSI 2096E offers non-volatile reprogrammability of all logic, as well as the interconnect to provide truly reconfigurable systems.
特性 Features
? SUPERFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC
?? — 4000 PLD Gates
?? — 96 I/O Pins, Six Dedicated Inputs
?? — 96 Registers
?? — High Speed Global Interconnect
?? — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
?? — Small Logic Block Size for Random Logic
?? — 100% Functional/JEDEC Upward Compatible with ispLSI 2096 Devices
? HIGH PERFORMANCE E2CMOS? TECHNOLOGY
?? — fmax = 180 MHz Maximum Operating Frequency
?? — tpd = 5.0 ns Propagation Delay
?? — TTL Compatible Inputs and Outputs
?? — 5V Programmable Logic Core
?? — ispJTAG? In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port
?? — User-Selectable 3.3V or 5V I/O Supports MixedVoltage Systems
?? — PCI Compatible Outputs
?? — Open-Drain Output Option
?? — Electrically Erasable and Reprogrammable
?? — Non-Volatile
?? — Unused Product Term Shutdown Saves Power
? ispLSI OFFERS THE FOLLOWING ADDED FEATURES
?? — Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quality
?? — Reprogram Soldered Devices for Faster Prototyping
? OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
?? — Complete Programmable Device Can Combine Glue Logic and Structured Designs
?? — Enhanced Pin Locking Capability
?? — Three Dedicated Clock Input Pins
?? — Synchronous and Asynchronous Clocks
?? — Programmable Output Slew Rate Control to Minimize Switching Noise
?? — Flexible Pin Placement
?? — Optimized Global Routing Pool Provides Global Interconnectivity?
技術(shù)參數(shù)
- 型號(hào):
ISPLSI2096E
- 功能描述:
CPLD - 復(fù)雜可編程邏輯器件
- RoHS:
否
- 制造商:
Lattice
- 存儲(chǔ)類型:
EEPROM
- 大電池?cái)?shù)量:
128
- 最大工作頻率:
333 MHz
- 延遲時(shí)間:
2.7 ns
- 可編程輸入/輸出端數(shù)量:
64
- 工作電源電壓:
3.3 V
- 最大工作溫度:
+ 90 C
- 最小工作溫度:
0 C
- 封裝/箱體:
TQFP-100
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
LATTE/萊迪斯 |
24+ |
NA/ |
3541 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開(kāi)票 |
詢價(jià) | ||
Lattice Semiconductor Corporat |
23+ |
128-LQFP |
11200 |
主營(yíng):汽車電子,停產(chǎn)物料,軍工IC |
詢價(jià) | ||
LATTICE |
2016+ |
QFP128 |
5500 |
只做原裝,假一罰十,公司可開(kāi)17%增值稅發(fā)票! |
詢價(jià) | ||
LATTICE |
06+ |
QFP |
156 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
LATTICE/萊迪斯 |
25+ |
NA |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
LATTICE |
23+ |
SMD-TQFP128 |
9888 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
LATTICE |
25+ |
QFP |
4500 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售 |
詢價(jià) | ||
LATTICE |
23+ |
QFP |
2500 |
絕對(duì)全新原裝!現(xiàn)貨!特價(jià)!請(qǐng)放心訂購(gòu)! |
詢價(jià) | ||
LATTICE |
22+ |
QFP |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
LATTICE/萊迪斯 |
23+ |
QFP |
98900 |
原廠原裝正品現(xiàn)貨!! |
詢價(jià) |