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首頁>IS61SP6464-7PQ>規(guī)格書詳情

IS61SP6464-7PQ中文資料北京矽成數(shù)據(jù)手冊PDF規(guī)格書

IS61SP6464-7PQ
廠商型號

IS61SP6464-7PQ

功能描述

64K x 64 SYNCHRONOUS PIPELINE STATIC RAM

文件大小

119.41 Kbytes

頁面數(shù)量

20

生產(chǎn)廠商

ISSI

中文名稱

北京矽成

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

下載地址一下載地址二

更新時間

2025-8-9 16:20:00

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IS61SP6464-7PQ價格和庫存,歡迎聯(lián)系客服免費人工找貨

IS61SP6464-7PQ規(guī)格書詳情

DESCRIPTION

The ISSI IS61SP6464 is a high-speed, low-power synchronous static RAM designed to provide a burstable, high performance, secondary cache for the i486?, Pentium?, 680X0?, and PowerPC? microprocessors. It is organized as 65,536 words by 64 bits, fabricated with ISSIs advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.

FEATURES

? Fast access time:

– 133, 117, 100 MHz; 6 ns (83 MHz);

7 ns (75 MHz); 8 ns (66 MHz)

? Internal self-timed write cycle

? Individual Byte Write Control and Global Write

? Clock controlled, registered address, data and control

? Pentium? or linear burst sequence control using MODE input

? Five chip enables for simple depth expansion and address pipelining

? Common data inputs and data outputs

? Power-down control by ZZ input

? JEDEC 128-Pin TQFP 14mm x 20mm package

? Single +3.3V power supply

? Control pins mode upon power-up:

– MODE in interleave burst mode

– ZZ in normal operation mode

These control pins can be connected to GNDQ or VCCQ to alter their power-up state

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
ISSI
QFP100
731
正品原裝--自家現(xiàn)貨-實單可談
詢價
ISSI
2016+
QFP
6523
只做原裝正品現(xiàn)貨!或訂貨!
詢價
ISSI
22+
QFP
5000
全新原裝現(xiàn)貨!自家?guī)齑?
詢價
ISSI
23+
13218
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種
詢價
ISSI
2015+
SMD/DIP
19889
一級代理原裝現(xiàn)貨,特價熱賣!
詢價