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IS61NLF25636集成電路(IC)的存儲器規(guī)格書PDF中文資料

廠商型號 |
IS61NLF25636 |
參數(shù)屬性 | IS61NLF25636 封裝/外殼為119-BBGA;包裝為托盤;類別為集成電路(IC)的存儲器;產(chǎn)品描述:IC SRAM 9MBIT PARALLEL 119PBGA |
功能描述 | SRAM |
封裝外殼 | 119-BBGA |
文件大小 |
155.61 Kbytes |
頁面數(shù)量 |
20 頁 |
生產(chǎn)廠商 | ISSI |
中文名稱 | 矽成半導體 |
網(wǎng)址 | |
數(shù)據(jù)手冊 | |
更新時間 | 2025-9-23 17:52:00 |
人工找貨 | IS61NLF25636價格和庫存,歡迎聯(lián)系客服免費人工找貨 |
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IS61NLF25636規(guī)格書詳情
DESCRIPTION
The 8 Meg NF product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for network and communications customers. They are organized as 262,144 words by 32 bits, 262,144 words by 36 bits and 524,288 words by 18 bits, fabricated with ISSIs advanced CMOS technology.
Incorporating a no wait state feature, wait cycles are eliminated when the bus switches from read to write, or write to read. This device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers are controlled by a positive-edge-triggered single clock input. Operations may be suspended and all synchronous inputs ignored when Clock Enable, CKE is HIGH. In this state the internal device will hold their previous values.
All Read, Write and Deselect cycles are initiated by the ADV input. When the ADV is HIGH the internal burst counter is incremented. New external addresses can be loaded when ADV is LOW.
Write cycles are internally self-timed and are initiated by the rising edge of the clock inputs and when WE is LOW. Separate byte enables allow individual bytes to be written.
A burst mode pin (MODE) defines the order of the burst sequence. When tied HIGH, the interleaved burst sequence is selected. When tied LOW, the linear burst sequence is selected.
FEATURES
? 100 percent bus utilization
? No wait cycles between Read and Write
? Internal self-timed write cycle
? Individual Byte Write Control
? Single R/W (Read/Write) control pin
? Clock controlled, registered address, data and control
? Interleaved or linear burst sequence control using MODE input
? Three chip enables for simple depth expansion and address pipelining for TQFP
? Power Down mode
? Common data inputs and data outputs
? CKE pin to enable clock and suspend operation
? JEDEC 100-pin TQFP, 119 PBGA package
? Single +3.3V power supply (± 5)
? NF Version: 3.3V I/O Supply Voltage
? NLF Version: 2.5V I/O Supply Voltage
? Industrial temperature available
產(chǎn)品屬性
- 產(chǎn)品編號:
IS61NLF25636A-7.5B2I-TR
- 制造商:
ISSI, Integrated Silicon Solution Inc
- 類別:
集成電路(IC) > 存儲器
- 包裝:
托盤
- 存儲器類型:
易失
- 存儲器格式:
SRAM
- 技術(shù):
SRAM - 同步,SDR
- 存儲容量:
9Mb(256K x 36)
- 存儲器接口:
并聯(lián)
- 電壓 - 供電:
3.135V ~ 3.465V
- 工作溫度:
-40°C ~ 85°C(TA)
- 安裝類型:
表面貼裝型
- 封裝/外殼:
119-BBGA
- 供應商器件封裝:
119-PBGA(14x22)
- 描述:
IC SRAM 9MBIT PARALLEL 119PBGA
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
ISSI |
2450+ |
TQFP100 |
8850 |
只做原裝正品假一賠十為客戶做到零風險!! |
詢價 | ||
ISSI |
2014 |
TQFP100 |
417 |
原裝現(xiàn)貨支持BOM配單服務(wù) |
詢價 | ||
ISSI |
25+ |
TQFP100 |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 | ||
ISSI |
21+ |
TQFP100 |
7500 |
全新原裝長期特價銷售 |
詢價 | ||
ISSI |
23+ |
100-TQFP(14x20) |
1389 |
專業(yè)分銷產(chǎn)品!原裝正品!價格優(yōu)勢! |
詢價 | ||
ISSI, |
25+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開票! |
詢價 | |||
ISSI |
22+ |
TQFP |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價 | ||
ISSI |
25+ |
原廠原裝 |
16000 |
原裝優(yōu)勢絕對有貨 |
詢價 | ||
ISSI |
25+ |
TQFP100 |
10000 |
全新原裝正品支持含稅 |
詢價 | ||
ISSI(美國芯成) |
2021+ |
TQFP-100(14x20) |
499 |
詢價 |
相關(guān)庫存
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