描述 Description

IP1829A is a non-blocking, store-and-forward architecture switch controller, which builds 24-port 10/100Mbps Fast Ethernet MAC and PHY, 5-port Gigabit Ethernet MAC including 4-port RGMII/MII, and one-port RGMII/GMII/MII for external CPU in a single chip.
?IP1829A embeds a 4Mb SRAM for the use of packet buffer. It also provides various 2-wire interfaces, such as the CPU interface, SMI, and EEPROM interface, which allow the user to access the internal register, external PHY’s registers and EEPROM data. The serial LED can show the status of each port (such as Link, Speed, Activity and so on) by using 74HC164 or IP403 external device through 2-wire (LED_CLK, LED_DAT) signals driving from IP1829A.
?For avoiding loop occur, IP1829A supports STP, RSTP, and MSTP. Even a hardware loop detection mechanism is supported. There are 16K entries in the Lookup table. Hashing method can be selected either direct or CRC hashing for MAC address learning. Lookup Table aging time can be adjustable ranging from 55 seconds to 500 hours. IP1829A also provides the MAC learning threshold to limit the number of addresses learning.
?An independent Multicast table supports 256 entries. For the Internet Group Management Protocol, IP1829A supports IGMP v1/v2/v3 for IPv4 and MLD v1/v2 for IPv6 packet snooping and aging time function. For the IGMPv3 and MLDv2 application, IP1829A provides up to 10 sets IPv4 or 4 sets IPv6 address per entry for source list table.
?IP1829A has 4k entries for 802.1Q VLAN, which provides more security for VLAN member, and supports Independent VLAN Learning (IVL) and Share VLAN Learning (SVL). Further, IP1829A also has add/remove C-tag, S-tag, VLAN remarking, uplink link port and inactive VID redirect functions for the flexible VLAN application.
?IP1829A has 128 entries for ACL table. The ACL (Address Control List) function provides advanced and flexible control mechanism to decide what packet should do (action) if the packet matches ACL rule.

ACL Rule and action: Rules: (Port ID, DA, SA, DA/SA, DIP, SIP, TCP/UDP Port Number (DP and SP) )?Actions: (Sniffer, Insert/remove Tag, Priority, Redirection, Trap to CPU, BW limited, DSCP, sFlow, Drop, PTP, MIB Counter) For the Quality of Service application, IP1829A supports port-based, 802.1Q tag based, ACL based, IP CoS/DSCP based, SMAC based, IP address based, IGMP based and WAN/LAN based to decide the priority of output frame. For the Remarking application, IP1829A supports remarking for the DSCP, Ctag and Stag value of transmit packet.
?For the link aggregation application, IP1829A provides eight hashing methods (Port ID, DA, SA, DA/SA, DIP, SIP, DP, and SP) and support six trunk groups’ sets.
?For meeting the various network applications, IP1829A also supports storm control, bandwidth rate control, Output Queues functions, Sniffer, sFlow, PTP, MIB counters and eight LED display modes. Therefore, IP1829A has the best adaptability and capability for the future network conditions.
?IP1829A supports the web-based management interface, such as Microsoft Internet Explorer or Mozilla Firefox, Google Chrome, the user can more easily configure IP1829A’s functions by these browsers, and no extra program is needed. Besides, IP1829A also provides IRMP (IC+ remote management protocol) to let the users remotely configure the registers of IP1829A.

特性 Features

? 24-Port 10/100Mb + 5-Port 10/100/1000Mb Ethernet Switch
? Built-in 24 10/100Mb PHYs ?
? RGMII/MII interface for 4 10/100/1000Mb ?PHYs ?
? 1 GMII/RGMII/MII interface for external CPU ?(optional) ?
? Support IEEE802.3az ?
? Support 10/100Mb full/half duplex ?
? Support 1000Mb full duplex ?
? 100Mb TP and Fiber dual mode, selected by ?Signal Detection (SD) level ?

? Store & Forward, Share Memory Non-blocking ?Architecture
? Built-in 4Mb SRAM for packet buffer ?
? Support 16K Jumbo packet ?
? Max. Length 1664B without supporting jumbo ?packet ?

? Wire-Speed Operation On Every Port ?
? Head Of Line Blocking Prevention ?
? Flow Control
? 802.3x compliant flow control in full duplex ?
? Collision/Carrier_ sense based backpressure ?in half duplex

? Internal 16K MAC Address Entities
? CRC/Direct hashing algorithm ?
? Aging timer programmable (55s~500hrs) ?
? Wire-speed address learning and resolution ?
? CPU accessible for security and static MAC ?
? Learning enable/disable ?

? IGMP/MLD Snooping
? IGMP Version 1, 2, 3 / MLD Version 1, 2 ?
? MLD snooping. (4 sets IP address per MLD ?list) ?
? Snooping by Switch ASIC or CPU ?

? Six Trunk Group
? Four trunk groups, trunk A~D up to 4 ports ?
? Trunk E, F has only 2 ports per trunk ?
? Load balance based on (Port ID, DA, SA, ?DA/SA, IP, TCP/UTP) ?
? Link fault recovery ?

? Per Port 41 MIB Counters/port ?
? RMON/ Ethernet/ MIB II

? Hardware Auto loop detection
? VLAN
? 29 Port-based?
? 4K Tag based?
? Support Tag remove/add/modify?
? IVL/SVL learning mode?
? Support Protocol VLAN?
? Support Q-in-Q (double tag)?
? 64 configurable VID for Q-in-Q tag stacking

? Class Of Service (CoS)?
? Support FIFS/SP/WRR/SP+WRR/WFQ/ TWRR in Output Queue Schedule Modes
? Port-based priority?
? 802.1Q priority tag based?
? IP TOS based (IPv4/IPv6)?
? TCP/UDP port number based?
? Source MAC address based?
? ACL based?
? Privilege priority?
? 8 levels per port

? Priority queuing decision
? DSCP/ TAG priority remarking ?
? 802.1Qad PCP, DEN insert / modify ?
? 802.1Q PCP, CFI insert/ modify ?
? RX &TX Priority re-mapping ?
? LLQ + latency

? Broadcast/multicast/DLF/ARP/ICMP Storm Control ?
? 256 levels resolution for all storm control ?
? Storm control can be enabled for per port ?
? With the option to drop all ARP to CPU ?
? Unit time can be selected for all storm control

? Sniffer Function ?
? Ingress, egress, ingress/egress methods ?
? Two Sniffer destination port group ?configurations ?
? Add/ Remove Tag option for packet routing to ?mirroring ports ?
? ACL and the special tag for sniffer application ?

? Port Security ?
? MAC-based?
? TCP/UDP port based?
? SIP-based?
? 802.1x: Port-based & MAC-based

? Bandwidth Control
? From 64K bps to wire speed (resolution 64k) ?
? Support Flow control on/off ?
? Queue based bandwidth control ?(resolution 64k/1M/2M/4M) ?

? SMI Interface Auto-Polling
? Speed, Duplex, Flow control, Link ?
? CPU accessible and interrupt ?
? CPU R/W PHY register ?
? Support MMD access ?

? Out Queue
? Frame buffer/ queue/ port based aging ?
? Bandwidth assured/ limited ?
? Latency assured ?
? WRED (Weight Random Early Drop) ?
? Support LLQ (Low latency queue) ?
? Dorm mode (WAN/LAN dual schedule mode)

? Spanning Tree Protocol Port State
? Support Discard/Block/Learning/Forwarding four states ?
? Forwarding STP frame to CPU port ?
? Support RSTP/MSTP ?

? Access Control List
? 128 ACL Entities ?
? Ingress port ?
? VLAN ?
? Destination/Source MAC address ?
? Destination/Source IP (specific or range) ?
? TCP/UDP Destination/Source port number ?(specific or range) ?
? IP protocol, DSCP, TCP flags?
? Action: forward, to CPU, drop, priority, ?Q-in-Q tag, remarking, redirect, bandwidth ?limited ?

? Configuration
? Pin initial setting ?
? 2-wire serial interface for accessing EEPROM ?
? Advanced EEPROM program mode ?
? 2/4-wire serial interface for low-cost smart ?system application ?

? Programmable serial LED Display Function ?
? 8 modes/ flashing speed selectable
? Power on cable diagnosis indication
? Loop indication

? Auto Test Function For Mass-production
? Auto-generate test frames?
? Show the result on the LED output

? Interrupt Pin For PHY Mode/Link/SMI R/W
? Complete notification

? Special TAG
? OAM (IEEE 802.3 ah)?
? Auto-discovery?
? Fault indication?
? Remote LoopBack test

? IEEE1588 stamp
? 16-time stamps for Ingress/Egress per port
? Support Event trigger stamp
? Support Pulse Per Second (PPS) output
? Support PTP trigger out ?

? IC+ Remote Management Protocol (IRMP) ?
? Build-in SRAM Self Test (BIST)
? sFlow ?
? EoC cable failure auto detection and isolation ?hardware ?
? L3/L2 Protocol packets forwarding to CPU or ?broadcast or drop ?LACP, LLDP, IGMP, MLD, ICMP, BPDU, 802.1x, GARP
? IPv6 function
? TCP/UDP port number and FLAG
? Finding out next header is based on ICMPv6, ?authentication, encapsulation, fragment or ?user-defined header ?

? Only need one 25MHz Crystal ?
? Adjustable IO voltage
? (2.5V~3.3V of GMII/RGMII/MII for port 29, 2.0V~3.3V of RGMII/MII for port 25~ port 28) ?

? Built-in 2.0V regulator ?
? Packaging and Operating Temperature
? 256 LQFP, 257 E-Pad Ground, 0°C~70°C
? IP1829?(0°C to 70°C)
? IP1829I?(-40°C to 85°C)