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首頁(yè)>HS1-3182-8>規(guī)格書詳情

HS1-3182-8中文資料INTERSIL數(shù)據(jù)手冊(cè)PDF規(guī)格書

HS1-3182-8
廠商型號(hào)

HS1-3182-8

功能描述

ARINC 429 Bus Interface Line Driver Circuit

文件大小

199.6 Kbytes

頁(yè)面數(shù)量

7 頁(yè)

生產(chǎn)廠商

INTERSIL

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-15 13:35:00

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HS1-3182-8規(guī)格書詳情

The HS-3182 is a monolithic dielectric ally isolated bipolar

differential line driver designed to meet the specifications of

ARINC 429. This device is intended to be used with a

companion chip, HS-3282 CMOS ARINC Bus Interface

Circuit, which provides the data formatting and processor

interface function.

All logic inputs are TTL and CMOS compatible. In addition to

the DATA (A) and DATA (B) inputs, there are also inputs for

CLOCK and SYNC signals which are AND’d with the DATA

inputs. This feature enhances system performance and

allows the HS-3182 to be used with devices other than the

HS-3182.

Three power supplies are necessary to operate the HS-3182:

+V = +15V ±10, -V = -15V ±10, and V1 = 5V ±5. VREF is

used to program the differential output voltage swing such that

VOUT (DIFF) = ±2VREF. Typically, VREF = V1 = 5V ±5, but a

separate power supply may be used for VREF which should

not exceed 6V.

The driver output impedance is 75Ω ±20 at +25°C. Driver

output rise and fall times are independently programmed

through the use of two external capacitors connected to the CA

and CB inputs. Typical capacitor values are CA = CB = 75pF for

high-speed operation (100kBPS), and CA = CB = 300pF for

low-speed operation (12kBPS to 14.5kBPS). The outputs are

protected against overvoltage and short circuit as shown in the

Block Diagram. The HS-3182 is designed to operate over an

ambient temperature range of -55°C to +125°C, or -40°C to

+85°C

特性 Features

? RoHS/Pb-free Available for SBDIP Package (100 Gold

Termination Finish)

? TTL and CMOS Compatible Inputs

? Adjustable Rise and Fall Times via Two External

Capacitors

? Programmable Output Differential Voltage via VREF Input

? Operates at Data Rates Up to 100k Bits/s

? Output Short Circuit Proof and Contains Overvoltage

Protection

? Outputs are Inhibited (0V) If DATA (A) and DATA (B)

Inputs are Both in the “Logic One” State

? DATA (A) and DATA (B) Signals are “AND’d” with Clock

and Sync Signals

? Full Military Temperature Range

產(chǎn)品屬性

  • 型號(hào):

    HS1-3182-8

  • 制造商:

    Intersil Corporation

  • 功能描述:

    LINE DRVR 16PIN SBCDIP - Rail/Tube

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INTERSIL
24+
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34560
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Renesas/瑞薩
2324+
NA
78920
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INETRSIL
2147+
原廠封裝
5000
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INTERSIL
24+
DIP
5000
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24+
CDIP16
6000
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INTERSIL
2023+
SBDIP-16
10000
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INTERSIL
25+
AUDIP
32360
INTERSIL全新特價(jià)HS1-3182-8即刻詢購(gòu)立享優(yōu)惠#長(zhǎng)期有貨
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INTERSI
16
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6000
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ITS
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5800
進(jìn)口原裝,現(xiàn)貨熱賣
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