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首頁(yè)>HEF4508BP>規(guī)格書(shū)詳情

HEF4508BP中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

HEF4508BP
廠商型號(hào)

HEF4508BP

功能描述

Dual 4-bit latch

文件大小

107.27 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

生產(chǎn)廠商 Philips Semiconductors
企業(yè)簡(jiǎn)稱

PHI飛利浦

中文名稱

荷蘭皇家飛利浦

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-7-31 11:36:00

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HEF4508BP規(guī)格書(shū)詳情

DESCRIPTION

The HEF4508B is a dual 4-bit latch, which consists of two identical independent 4-bit latches with separate strobe (ST), master reset (MR), output-enable input (EO) and 3-state outputs (O).

With the ST input in the HIGH state, the data on the D inputs appear at the corresponding outputs provided EO is LOW. Changing the ST input to the LOW state locks the data into the latch. A HIGH on the reset line forces the outputs to a LOW level regardless of the state of the ST input. The 3-state outputs are controlled by the output-enable input. A HIGH on EO causes the outputs to assume a high impedance OFF-state regardless of other input conditions. This allows the outputs to interface directly with bus orientated systems. When EO is LOW the contents of the latches are available at the outputs.

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25+
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3200
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16900
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PHI
23+
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5000
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ST/意法
23+
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10000
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8200
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23+
DIP
5000
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24+
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2
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