描述 Description

The HEF4013B is a dual D-type flip-flop that features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is LOW and is transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock input’s Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.

特性 Features

? Tolerant of slow clock rise and fall times
? Fully static operation
? 5 V, 10 V, and 15 V parametric ratings
? Standardized symmetrical output characteristics
? Specified from -40 °C to +125 °C
? Complies with JEDEC standard JESD 13-B

應(yīng)用 Application

? Counters and dividers
? Registers
? Toggle flip-flops