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HD74HCT137中文資料日立數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
HD74HCT137 |
| 功能描述 | 3-to-8-line Decoder/Demultiplexer with Address Latch |
| 文件大小 |
56.2 Kbytes |
| 頁面數(shù)量 |
8 頁 |
| 生產(chǎn)廠商 | HITACHI Hitachi Semiconductor |
| 中文名稱 | 日立 日立公司 |
| 網(wǎng)址 | |
| 數(shù)據(jù)手冊 | |
| 更新時(shí)間 | 2025-8-9 13:31:00 |
| 人工找貨 | HD74HCT137價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
HD74HCT137規(guī)格書詳情
描述 Description
The HD74HCT137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches. As long as GL remains high no address changes will be recognized. Output enable controls, G1 and G2, control the state of the outputs independently of the select or latch-enable inputs.
特性 Features
? LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
? High Speed Operation: tpd (A, B, C to Y) = 18 ns typ (CL = 50 pF)
? High Output Current: Fanout of 10 LSTTL Loads
? Wide Operating Voltage: VCC = 4.5 to 5.5 V
? Low Input Current: 1 μA max
? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HITACHI/日立 |
24+ |
SOP16 |
60000 |
詢價(jià) | |||
HITACHI |
23+ |
10000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價(jià)格優(yōu)勢、品種 |
詢價(jià) | |||
HIT/SOP5.2 |
23+ |
52685 |
##公司主營品牌長期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù) |
詢價(jià) | |||
RENESAS |
23+ |
SOP5.2 |
5000 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
HIT/SOP5.2 |
1922+ |
NA |
7880 |
原盒原包裝現(xiàn)貨原裝假一罰十價(jià)優(yōu) |
詢價(jià) | ||
HITACHI/日立 |
23+ |
DIP16 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
HIT |
23+ |
SOP |
7000 |
絕對全新原裝!100%保質(zhì)量特價(jià)!請放心訂購! |
詢價(jià) | ||
HIT |
24+ |
SOP |
661 |
詢價(jià) | |||
HITACHI |
25+ |
SOT235 |
3200 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售 |
詢價(jià) | ||
日立 |
2023+ |
SOP |
50000 |
原裝現(xiàn)貨 |
詢價(jià) |
