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首頁 >GAL22V10D>規(guī)格書列表

型號	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
GAL22V10D-4LJN	文件：718.73 Kbytes Page：23 Pages	GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-5LJ	文件：718.73 Kbytes Page：23 Pages	GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-5LJ	文件：718.73 Kbytes Page：23 Pages	Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-5LJ	文件：386.45 Kbytes Page：29 Pages	High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：386.45 Kbytes 頁數(shù)：29 Pages	Lattice 萊迪思	Lattice
GAL22V10D-5LJN	文件：718.73 Kbytes Page：23 Pages	GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-5LJN	文件：718.73 Kbytes Page：23 Pages	Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-7LJ	文件：718.73 Kbytes Page：23 Pages	Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-7LJ	文件：386.45 Kbytes Page：29 Pages	High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：386.45 Kbytes 頁數(shù)：29 Pages	Lattice 萊迪思	Lattice
GAL22V10D-7LJ	文件：718.73 Kbytes Page：23 Pages	GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice
GAL22V10D-7LJI	文件：718.73 Kbytes Page：23 Pages	GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les 文件：718.73 Kbytes 頁數(shù)：23 Pages	Lattice 萊迪思	Lattice

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技術(shù)參數(shù)

延遲時間 tpd（1）最大值：
10ns
電源電壓 - 內(nèi)部：
4.5 V ~ 5.5 V
宏單元數(shù)：
10
工作溫度：
-40°C ~ 85°C（TA）
安裝類型：
表面貼裝
封裝/外殼：
28-LCC（J 形引線）
供應(yīng)商器件封裝：
28-PLCC（11.51x11.51）

供應(yīng)商	型號	品牌	批號	封裝	庫存	備注	價格
深圳市高捷芯城科技有限公司	GAL22V10D	Lattice(萊迪斯)	24+	標(biāo)準(zhǔn)封裝	11848	原廠渠道供應(yīng),大量現(xiàn)貨,原型號開票。	詢價
深圳市富誠威科技有限公司	GAL22V10D	Lattice	24+	PLCC28	2250	100%全新原裝公司現(xiàn)貨供應(yīng)!隨時可發(fā)貨	詢價
深圳市壹芯創(chuàng)科技有限公司	GAL22V10D	LATTICE	22+	PLCC	2000	進(jìn)口原裝!現(xiàn)貨庫存	詢價
上海金慶電子技術(shù)有限公司	GAL22V10D	LATTICE	新		2	全新原裝貨期兩周	詢價
深圳誠思涵科技有限公司	GAL22V10D	LATTICE	18+	DIP24	85600	保證進(jìn)口原裝可開17%增值稅發(fā)票	詢價
深圳市賽爾通科技有限公司	GAL22V10D	LAT	23+		65480		詢價
中天科工半導(dǎo)體（深圳）有限公司	GAL22V10D		20+		36800	原裝優(yōu)勢主營型號-可開原型號增稅票	詢價
深圳市河鋒鑫科技有限公司	GAL22V10D	Lattice(萊迪斯)	2021/2022+	標(biāo)準(zhǔn)封裝	3500	原廠原裝現(xiàn)貨訂貨價格優(yōu)勢終端BOM表可配單提供樣品	詢價
深圳市恒達(dá)億科技有限公司	GAL22V10D	LATTICE	25+	PLCC	3200	全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售	詢價
貿(mào)澤芯城（深圳）電子科技有限公司	GAL22V10D	LATTICE/萊迪斯	23+	DIP	10000	原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種	詢價

更多GAL22V10D供應(yīng)商更新時間2025-8-10 9:38:00

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