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FT93C66A-UXX

EEPROM-3-wire; Standard Voltage and Low Voltage Operation:\n? ? ? ??FT93C46/56/66: VCC = 2.5V to 5.5V\n? ? ? ??FT93C46A/56A/66A: VCC = 1.8V to 5.5V\nUser Selectable Internal Organization:\n? ? ? ??FT93C46: ? ? 128 x 8 or ? 64 x 16\n? ? ? ??FT93C56: ? ? 256 x 8 or 128 x 16\n? ? ? ??FT93C66: ? ? 512 x 8 or 256 x 16\n2 MHz Clock Rate (5V) Compatibility.\nIndustry Standard 3-wire Serial Interface.\nSelf-Timed ERASE/WRITE Cycles (5ms max including auto-erase).\nAutomatic ERAL before WRAL.\nSequential READ Function.\nHigh Reliability: ?Typical 1 Million Erase/Write Cycle Endurance.\n100 Years Data Retention.\nIndustrial Temperature Range (-40o C to 85o C).\nStandard 8-pin DIP/SOP/TSSOP/DFN Pb-free Packages.\n\n;

The FT93C46/56/66 series are 1024/2048/4096 bits of serial Electrical Erasable and Programmable Read Only Memory, commonly known as EEPROM. They are organized as 64/128/256 words of 16 bits ?each when the ORG pin is connected to VCC (or unconnected) and 128/256/512 words of 8 bits (1 byte) each when the ORG pin is tied to ground. ?The devices are fabricated with proprietary advanced CMOS process for low power and low voltage applications. ?These devices are available in standard 8-lead DIP, 8-lead JEDEC SOP, 8-lead TSSOP and 8-lead DFN packages. Our extended VCC range (1.8V to 5.5V) devices enables wide spectrum of applications.\n The FT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SCL). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self-timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. Once a device begins its self-timed program procedure, the data out pin (DO) can indicate the READY/BUSY status by rising chip select (CS).\n \n

IS93C66A

2K-BIT/4K-BITSERIALELECTRICALLYERASABLEPROM

DESCRIPTION TheIS93C56A/66Aare2kb/4kbnon-volatile,ISSI?serialEEPROMs.TheyarefabricatedusinganenhancedCMOSdesignandprocess.TheIS93C56A/66Acontainpower-efficientread/writememory,andorganizationofeither256/512bytesof8bitsor128/256wordsof16bits.WhentheORGpin

M93C66

16Kbit,8Kbit,4Kbit,2Kbitand1Kbit(8-bitor16-bitwide)MICROWIRE?serialaccessEEPROM

M93C66

16Kbit,8Kbit,4Kbit,2Kbitand1Kbit(8-bitor16-bitwide)MICROWIRE?serialaccessEEPROM

M93C66

16Kbit,8Kbit,4Kbit,2Kbitand1Kbit(8-bitor16-bitwide)MICROWIRESerialAccessEEPROM

M93C66

16Kbit,8Kbit,4Kbit,2Kbit,1Kbitand256bit8-bitor16-bitwide

Description TheM93C86,M93C76,M93C66,M93C56andM93C46areelectricallyerasableprogrammablememory(EEPROM)devices.TheyareaccessedthroughaSerialDatainput(D)andSerialDataoutput(Q)usingtheMICROWIREbusprotocol. Features ●IndustrystandardMICROWIREbus ●Singlesupplyvo

M93C66

16Kbit,8Kbit,4Kbit,2Kbitand1Kbit(8-bitor16-bitwide)MICROWIRESerialAccessEEPROM

M93C66

16Kbit,8Kbit,4Kbit,2Kbitand1Kbit(8-bitor16-bitwide)

M93C66BN

16Kbit,8Kbit,4Kbit,2Kbit,1Kbitand256bit8-bitor16-bitwide

Description TheM93C86,M93C76,M93C66,M93C56andM93C46areelectricallyerasableprogrammablememory(EEPROM)devices.TheyareaccessedthroughaSerialDatainput(D)andSerialDataoutput(Q)usingtheMICROWIREbusprotocol. Features ●IndustrystandardMICROWIREbus ●Singlesupplyvo

M93C66-DRE

16-Kbit,8-Kbit,4-Kbit,2-Kbitand1-Kbit