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EP1C12

Cyclone FPGA Family Data Sheet

Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12

Cyclone Series Device Thermal Resistance

CycloneIIIDeviceFamilyOverview Cyclone?IIIdevicefamilyoffersauniquecombinationofhighfunctionality,lowpowerandlowcost.BasedonTaiwanSemiconductorManufacturingCompany(TSMC)low-power(LP)processtechnology,siliconoptimizationsandsoftwarefeaturestominimizepowercons

EP1C12

1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet

TheAlteraenhancedconfigurationdeviceisasingle-device,high-speed,advancedconfigurationsolutionforveryhigh-densityFPGAs.Thecoreofanenhancedconfigurationdeviceisdividedintotwomajorblocks,aconfigurationcontrollerandaflashmemory.Theflashmemoryisusedtostoreconf

EP1C12

Cyclone Device Handbook, Volume 1

EP1C12

Enhanced Configuration (EPC) Devices Datasheet

EP1C12

Package Information Datasheet for Mature Altera Devices

EP1C12

This datasheet describes enhanced configuration (EPC) devices

EP1C12

Package Information Datasheet for Mature Altera Devices

EP1C12

Cyclone FPGA Family

EP1C12F100C6ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)