描述 Description

The DSLVDS1002 is a single channel Low Voltage Differential Signaling (LVDS) receiverdesigned for applications requiring low power dissipation, low noise and high data rates. Inaddition, the short circuit fault current is also minimized. The DSLVDS1002 device is designed tosupport data rates that are at least 400 Mbps (200 MHz) utilizing LVDS technology.
The DSLVDS1002 accepts low voltage (±350-mV typical) differential input signals andoutputs a 3.3-V CMOS/TTL signal. The receivers also support open, shorted, and terminated (100 ?)input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DSLVDS1002 isin a 5-lead SOT-23 package that is designed for easy PCB layout.
The DSLVDS1002 can be paired with its companion single line driver, DSLVDS1001, or withany LVDS driver, to provide a high-speed LVDS Interference.

特性 Features

? 旨在用于信號傳輸速率高達 400Mbps 的應(yīng)用
? 單個 3.3V 電源設(shè)計（3V 至 3.6V 的范圍）
? 100ps 典型差動偏斜
? 3.5ns 最大傳播延遲
? 接受小擺幅差動信號電平
? 斷電保護（LVDS 輸入端具有高阻抗）
? 直通引腳排列可簡化 PCB 布局
? 低功耗（3.3V 典型電源時為 10mW）
? LVDS 接收器輸入端接受 LVDS/BLVDS/LVPECL 輸入
? 針對開路、短路和終止輸入的失效防護保護
? 5 引腳 SOT-23 封裝
? 符合或超出 ANSI TIA/EIA-644-A 標準
? 工業(yè)工作溫度范圍（?40°C 至 +85°C）