最新无码a∨在线观看,一本av高清一区二区三区,亚洲熟妇色l20p,宅男噜噜69av,中出あ人妻熟女中文字幕

DS91C180

DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType

DS91C180

100MHz M-LVDS 線路驅(qū)動(dòng)器/接收器組合; ? DC to 100+ MHz / 200+ Mbps Low Power, Low EMI Operation\n? Optimal for ATCA, uTCA Clock Distribution Networks\n? Meets or Exceeds TIA/EIA-899 M-LVDS Standard\n? Wide Input Common Mode Voltage for Increased Noise Immunity\n? DS91D180 has Type 1 Receiver Input\n? DS91C180 has Type 2 Receiver Input for Fail-Safe Functionality\n? Industrial Temperature Range\n? Space Saving SOIC-14 Package (JEDEC MS-012);

The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks. The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.

DS91C180

Multipoint LVDS (M-LVDS) Line Driver/Receiver

DS91C180

100 MHz M-LVDS Line Driver/Receiver Pair

DS91C180

100 MHz M-LVDS Line Driver/Receiver Pair

DS91C180TMA/NOPB

絲?。?a target="_blank" title="Marking" href="/ds91c180tma/marking.html">DS91C180TMA；Package：SOIC；DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType

DS91C180TMA/NOPB.A

絲?。?a target="_blank" title="Marking" href="/ds91c180tma/marking.html">DS91C180TMA；Package：SOIC；DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType

DS91C180TMASLASHNOPB

絲?。?a target="_blank" title="Marking" href="/ds91c180tma/marking.html">DS91C180TMA；Package：SOIC；DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType

DS91C180TMASLASHNOPB.A

絲?。?a target="_blank" title="Marking" href="/ds91c180tma/marking.html">DS91C180TMA；Package：SOIC；DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType

DS91C180TMAX/NOPB

絲印：DS91C180TMA；Package：SOIC；DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair

1FEATURES 2?DCto100+MHz/200+MbpsLowPower,Low EMIOperation ?OptimalforATCA,uTCAClockDistribution Networks ?MeetsorExceedsTIA/EIA-899M-LVDS Standard ?WideInputCommonModeVoltagefor IncreasedNoiseImmunity ?DS91D180hasType1ReceiverInput ?DS91C180hasType