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DS90LV032A

DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper

DS90LV032A

3V 400Mbps LVDS 四路差動線路接收器; ? >400 Mbps (200 MHz) Switching Rates\n? 0.1-ns Channel-to-Channel Skew (Typical)\n? 0.1-ns Differential Skew (Typical)\n? 3.3-ns Maximum Propagation Delay\n? 3.3-V Power Supply Design\n? Power Down High Impedance on LVDS Inputs\n? Low Power Design (40 mW at 3.3 V Static)\n? Interoperable With Existing 5-V LVDS Networks\n? Accepts Small Swing (350 mV Typical) VID\n? Supports Open, Short, and Terminated Input Fail-Safe\n? Compatible With ANSI/TIA/EIA-644\n? Industrial Temperature Operating Range (–40°C to 85°C)\n? Available in SOIC and TSSOP Packaging;

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.

DS90LV032A

3V LVDS Quad CMOS Differential Line Receiver

DS90LV032AQML

3V LVDS 四路 CMOS 差動線路接收器; ? Low chip to chip skew\n? Low differential skew\n? High impedance LVDS inputs with power-off\n? Low power dissipation\n? Accepts small swing (330 mV) differential signal levels.\n? Compatible with ANSI/TIA/EIA-644\n? Operating temperature range (-55°C to +85°C)\n? Pin compatible with DS90C032A and DS26C32A.\n? Typical Rise/Fall time is 350pS.;

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

DS90LV032AQML-SP

3V LVDS 四路 CMOS 差動線路接收器; ? Low chip to chip skew\n? Low differential skew\n? High impedance LVDS inputs with power-off\n? Low power dissipation\n? Accepts small swing (330 mV) differential signal levels.\n? Compatible with ANSI/TIA/EIA-644\n? Operating temperature range (-55°C to +85°C)\n? Pin compatible with DS90C032A and DS26C32A.\n? Typical Rise/Fall time is 350pS.;

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

DS90LV032ATM/NOPB

絲?。?a target="_blank" title="Marking" href="/ds90lv032atm/marking.html">DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper

DS90LV032ATM/NOPB.B

絲?。?a target="_blank" title="Marking" href="/ds90lv032atm/marking.html">DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper

DS90LV032ATMSLASHNOPB

絲?。?a target="_blank" title="Marking" href="/ds90lv032atm/marking.html">DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper

DS90LV032ATMSLASHNOPB.B

絲印：DS90LV032ATM；Package：SOIC；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper

DS90LV032ATMTC/NOPB

絲?。?a target="_blank" title="Marking" href="/ds90lv032at/marking.html">DS90LV032AT；Package：TSSOP；DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver

1Features 1?>400Mbps(200MHz)SwitchingRates ?0.1-nsChannel-to-ChannelSkew(Typical) ?0.1-nsDifferentialSkew(Typical) ?3.3-nsMaximumPropagationDelay ?3.3-VPowerSupplyDesign ?PowerDownHighImpedanceonLVDSInputs ?LowPowerDesign(40mWat3.3VStatic) ?Interoper