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DS90CF384AQ

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQ

DS90CF384AQ 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQ-Q1

+3.3V LVDS 接收器 24 位平板顯示器 (FPD) 鏈路 - 65MHz - 汽車級; ? Automotive Grade Device, AEC-Q100 Grade 3 Qualified\n? Operating Temperature Range: –40°C to +85°C\n? 20 to 65 MHz Shift Clock Support\n? 50% Duty Cycle on Receiver Output Clock \n? Best–in–Class Set & Hold Times on RxOUTPUTs\n? Rx Power Consumption 7 kV (HBM), >700V (EIAJ) \n? Supports VGA, SVGA, XGA and Dual Pixel SXGA. \n? PLL Requires No External Components\n? Compatible with TIA/EIA-644 LVDS Standard\n? Low Profile 56-Lead TSSOP Package;

The DS90CF384AQ receiver converts the four LVDS data streams at up to 1.8 Gbps throughput (227 Megabytes/sec bandwidth) back into parallel 28 bits of LVCMOS/LVTTL data. In a Display application, the 28 bits include: 24 bits of RGB data and up to 4 bits of video control (Hsync, Vsync, DE and CNTL). The DS90CF384AQ device is enhanced over prior generation FPD-Link receivers, provides a wider data valid time on the receiver output and is offered as an AEC-Q100 grade 3 device. FPD-Link is an ideal means to solve EMI and cable size problems associated with wide, high speed LVCMOS/LVTTL interfaces.

DS90CF384AQ_15

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQMT/NOPB

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQMT/NOPB

顯示接口集成電路 3.3V LVDS Receiver 24B FPD Link;

DS90CF384AQMTSLASHNOPB

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQMTX/NOPB

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

DS90CF384AQMTX/NOPB

顯示接口集成電路 3.3V LVDS Receiver 24B FPD Link;

DS90CF384AQMTXSLASHNOPB

3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz