首頁(yè)>DS3486MX/NOPB.B>規(guī)格書(shū)詳情
DS3486MX/NOPB.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
DS3486MX/NOPB.B |
| 功能描述 | DS3486 Quad RS-422, RS-423 Line Receiver |
| 絲印標(biāo)識(shí) | |
| 封裝外殼 | SOIC |
| 文件大小 |
326.51 Kbytes |
| 頁(yè)面數(shù)量 |
12 頁(yè) |
| 生產(chǎn)廠商 | TI2 |
| 中文名稱 | 德州儀器 |
| 網(wǎng)址 | |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-8-7 17:10:00 |
| 人工找貨 | DS3486MX/NOPB.B價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
DS3486MX/NOPB.B規(guī)格書(shū)詳情
1FEATURES
2? Four Independent Receivers
? TRI-STATE Outputs
? Internal Hysteresis ?140 mV (typ)
? Fast Propagation Times ?19 ns (typ)
? TTL Compatible Outputs
? 5V Supply
? Pin Compatible and Interchangeable with
MC3486
DESCRIPTION
Texas Instruments' quad RS-422, RS-423 receiver
features four independent receivers which comply
with EIA Standards for the electrical characteristics of
balanced/unbalanced voltage digital interface circuits.
Receiver outputs are 74LS compatible, TRI-STATE
structures which are forced to a high impedance state when the appropriate output control pin reaches a
logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for
either logic one or logic zero inputs. In addition, each
receiver has internal hysteresis circuitry to improve
noise margin and discourage output instability for
slowly changing input waveforms.
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
NS |
23+ |
DIP16 |
390 |
原裝現(xiàn)貨 |
詢價(jià) | ||
NS |
23+ |
65480 |
詢價(jià) | ||||
NS |
23+ |
DIP-16 |
9823 |
詢價(jià) | |||
NSC |
23+ |
原裝原封 |
8888 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
NS |
06+ |
DIP |
48 |
自己公司全新庫(kù)存絕對(duì)有貨 |
詢價(jià) | ||
NS |
22+ |
DIP-16 |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
NSC |
24+ |
DIP16 |
90000 |
一級(jí)代理商進(jìn)口原裝現(xiàn)貨、價(jià)格合理 |
詢價(jià) | ||
NS |
03+ |
DIP-16 |
42 |
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢 |
詢價(jià) | ||
24+ |
DIP |
19 |
詢價(jià) | ||||
NSC |
24+ |
DIP16 |
2650 |
原裝優(yōu)勢(shì)!絕對(duì)公司現(xiàn)貨 |
詢價(jià) |
