DS25CP114屬于集成電路（IC）的信號開關多路復用器解碼器。由美國德州儀器公司制造生產的DS25CP114信號開關，多路復用器，解碼器邏輯型信號開關、多路復用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據的電信號進行路由和選擇。這些器件與設計用于模擬信號的類似產品有所不同，它們保留的信息表示為兩個電狀態(tài)之一，而不是兩個外部界限內的無窮變化量。

1FEATURES

2? DC - 3.125 Gbps Low Jitter, Low Skew, Low

Power Operation

? Pin and SMBus Configurable, Fully

Differential, Non-Blocking Architecture

? Pin (Two Levels) and SMBus (Four Levels)

Selectable Pre-Emphasis and Equalization

Eliminate ISI Jitter

? Wide Input Common Mode Range Enables

Easy Interface to CML and LVPECL Drivers

? LOS Circuitry Detects Open Inputs Fault

Condition

? On-Chip 100Ω Input and Output Termination

Minimizes Insertion and Return Losses,

Reduces Component Count, Minimizes Board

Space The DS25CP114 Eliminates the On-Chip

Input Termination for Added Design Flexibility.

? 8 kV ESD on LVDS I/O Pins Protects Adjoining

Components

? Small 6 mm x 6 mm WQFN-40 Space Saving

Package

APPLICATIONS

? SD/HD/3G HD SDI Routers

? OC-48 / STM-16

? InfiniBand and FireWire

DESCRIPTION

The DS25CP104A and DS25CP114 are 3.125 Gbps

4x4 LVDS crosspoint switches optimized for highspeed

signal routing and switching over lossy FR-4

printed circuit board backplanes and balanced cables.

Fully differential signal paths ensure exceptional

signal integrity and noise immunity. The non-blocking

architecture allows connections of any input to any

output or outputs. The switch configuration can be

accomplished via external pins or the System

Management Bus (SMBus) interface.

The DS25CP104A and DS25CP114 feature four

levels (Off, Low, Medium, High) of transmit pre- emphasis (PE) and four levels (Off, Low, Medium,

High) of receive equalization (EQ) settable via the

SMBus interface. Off and Medium PE levels and Off

and Low EQ levels are settable with the external pins.

In addition, the SMBus circuitry enables the loss of

signal (LOS) monitors that can inform a system of the

presence of an open inputs condition (e.g. disconnected cable).

Wide input common mode range allows the switch to

accept signals with LVDS, CML and LVPECL levels;

the output levels are LVDS. A very small package

footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. On

the DS25CP104A each differential input and output is

internally terminated with a 100Ω resistor to lower

return losses, reduce component count and further

minimize board space. For added design flexibility the

100Ω input terminations on the DS25CP114 have

been eliminated. This enables a designer to build

custom crosspoint configurations and distribution

circuits that require a limited multidrop signaling

topology.