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DS25BR440

DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2?DC-3.125GbpsLowJitter,LowSkew,Low PowerOperation ?PinSelectableTransmitPre-Emphasisand ReceiveEqualizationEliminateData DependantJitter ?WideInputCommonModeVoltageRange AllowsDC-CoupledInterfacetoLVDS,CML andLVPECLDrivers ?LOSCircuitryDetects

DS25BR440

具有發(fā)送預(yù)加重和接收均衡功能的 3.125Gbps 四路 LVDS 緩沖器; ? DC - 3.125 Gbps Low Jitter, Low Skew, Low Power Operation\n? Pin Selectable Transmit Pre-Emphasis and Receive Equalization Eliminate Data Dependant Jitter\n? Wide Input Common Mode Voltage Range Allows DC-Coupled Interface to LVDS, CML and LVPECL Drivers\n? LOS Circuitry Detects Open Inputs Fault\n? Integrated 100? Input and Output Terminations\n? 8 kV ESD on LVDS I/O Pins Protects Adjoining Components\n? Small 6 mm x 6 mm WQFN-40 Space Saving Package;

The DS25BR440 is a 3.125 Gbps Quad LVDS buffer optimized for high-speed signal routing and repeating over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.The DS25BR440 features two levels of transmit pre-emphasis (PE) and two levels of receive equalization (EQ). Both of these features compensate for interconnect losses and ultimately maximize noise margin. A loss-of-signal (LOS) circuit monitors each input channel and a unique LOS pin is asserted when no signal is detected at that input.Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. Each differential input and output is internally terminated with a 100? resistor to lower device return losses, reduce component count and further minimize board space.

DS25BR440

3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

DS25BR440

3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

DS25BR440TSQSLASHNOPB

DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2?DC-3.125GbpsLowJitter,LowSkew,Low PowerOperation ?PinSelectableTransmitPre-Emphasisand ReceiveEqualizationEliminateData DependantJitter ?WideInputCommonModeVoltageRange AllowsDC-CoupledInterfacetoLVDS,CML andLVPECLDrivers ?LOSCircuitryDetects

DS25BR440TSQSLASHNOPB.A

DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2?DC-3.125GbpsLowJitter,LowSkew,Low PowerOperation ?PinSelectableTransmitPre-Emphasisand ReceiveEqualizationEliminateData DependantJitter ?WideInputCommonModeVoltageRange AllowsDC-CoupledInterfacetoLVDS,CML andLVPECLDrivers ?LOSCircuitryDetects

DS25BR440TSQXSLASHNOPB

DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2?DC-3.125GbpsLowJitter,LowSkew,Low PowerOperation ?PinSelectableTransmitPre-Emphasisand ReceiveEqualizationEliminateData DependantJitter ?WideInputCommonModeVoltageRange AllowsDC-CoupledInterfacetoLVDS,CML andLVPECLDrivers ?LOSCircuitryDetects

DS25BR440TSQXSLASHNOPB.A

DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2?DC-3.125GbpsLowJitter,LowSkew,Low PowerOperation ?PinSelectableTransmitPre-Emphasisand ReceiveEqualizationEliminateData DependantJitter ?WideInputCommonModeVoltageRange AllowsDC-CoupledInterfacetoLVDS,CML andLVPECLDrivers ?LOSCircuitryDetects

DS25BR440_15

3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

DS25BR440TSQ

3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization