DS25BR110屬于集成電路（IC）的信號緩沖器、中繼器、分離器。由美國德州儀器公司制造生產(chǎn)的DS25BR110信號緩沖器、中繼器、分離器信號緩沖器、中繼器和分離器系列中的產(chǎn)品適用于遠距離電氣互連或電纜系統(tǒng)的數(shù)字信息傳輸。所有實際互連系統(tǒng)都具有非理想特性，該系列產(chǎn)品主要用于解決數(shù)字信息傳輸過程中因此造成的模擬問題。此外，還有其他功能，例如不同物理接口樣式之間的轉(zhuǎn)換和多路復(fù)用。

1FEATURES

2? DC - 3.125 Gbps Low Jitter, High Noise

Immunity, Low Power Operation

? Four Levels of Receive Equalization Reduce

ISI Jitter

? On-Chip 100Ω Input and Output Termination

Minimizes Insertion and Return Losses,

Reduces Component Count, and Minimizes

Board Space

? 7 kV ESD on LVDS I/O Pins Protects Adjoining

Components

? Small 3 mm x 3 mm 8-WSON Space Saving

Package

APPLICATIONS

? Clock and Data Buffering

? Metallic Cable Equalization

? FR-4 Equalization

DESCRIPTION

The DS25BR110 is a single channel 3.125 Gbps

LVDS buffer optimized for high-speed signal

transmission over lossy FR-4 printed circuit board

backplanes and balanced metallic cables. A fully

differential signal path ensures exceptional signal

integrity and noise immunity.

The DS25BR110 features four levels of receive

equalization (EQ), making it ideal for use as a

receiver device. Other LVDS devices with similar IO

characteristics include the following products. The

DS25BR120 features four levels of pre-emphasis for

use as an optimized driver device, while the DS25BR100 features both pre-emphasis and

equalization for use as an optimized repeater device.

The DS25BR150 is a buffer/repeater with the lowest

power consumption and does not feature transmit

pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver

to accept signals with LVDS, CML and LVPECL

levels; the output levels are LVDS. A very small

package footprint requires minimal space on the

board while the flow-through pinout allows easy board

layout. The differential inputs and outputs are

internally terminated with a 100Ω resistor to lower

device input and output return losses, reduce

component count, and further minimize board space.