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DDS39RF12中文資料16 位、雙通道、24GSPS、12GHz 射頻直接數(shù)字合成器 (DDS)數(shù)據(jù)手冊(cè)TI規(guī)格書

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廠商型號(hào)

DDS39RF12

功能描述

16 位、雙通道、24GSPS、12GHz 射頻直接數(shù)字合成器 (DDS)

制造商

TI Texas Instruments

中文名稱

德州儀器 美國(guó)德州儀器公司

數(shù)據(jù)手冊(cè)

下載地址下載地址二

更新時(shí)間

2025-9-8 23:00:00

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DDS39RF12規(guī)格書詳情

描述 Description

DDS39RF12 and ?RFS12 are a family of dual and single channel direct digital synthesizers with 16-bit resolution digital-to-analog converters (DAC). The high sampling rate, output frequency range, 64-bit NCO frequency resolution and any frequency hopping with phase coherence makes the device capable of arbitrary waveform generation (AWG) and direct digital synthesis (DDS).

The devices can also be used as interpolating DACs for narrowband direct RF sampling or complex baseband signal generation. The maximum input data rate is 775MSPS for a single channel or 388MSPS for two channels. The devices can generate signals of up to 620MHz signal bandwidth (16-bit input resolution) at carrier frequencies exceeding 10GHz enabling direct sampling through C-band and into X-band.

A JESD204B and JESD204C compatible serial interface has 2 receiver pairs capable of up to 12.8Gbps each. The interface is JESD204B and JESD204C subclass-1 compliant for deterministic latency and multi-device synchronization through the use of SYSREF.

特性 Features

? 16-bit, 12 to 24GSPS, multi-Nyquist DAC cores
? Maximum input data rate:
? 16-bit, single channel complex I/Q: 775MSPS
? 16-bit, dual channel complex I/Q: 388MSPS

? Output bandwidth (-3dB): 12GHz
? Performance at fOUT = 2.997GHz, DES2XL mode, DEM and Dither off
? Noise floor (small signal): -154dBFS/Hz
? SFDR (-0.1dBFS): 68dBc
? IMD3 (-7dBFS each tone): -74dBc
? Additive phase noise, 10kHz offset: -138dBc/Hz

? Four Integrated digital up-converters (DUC)
? Interpolation: 4x, 6x, 8x, 12x ... 256x
? Complex baseband DUC for I/Q output
? Complex to real up conversion for dual channel direct RF sampling
? 64-bit frequency resolution NCOs

? Fast reconfiguration interface for fast frequency hopping
? 4-bit data with 200MHz clock
? 60ns reconfiguration (32-bit frequency)
? Any frequency hopping with phase coherence

? JESD204C Interface
? Up to 2 Lanes at up to 12.8Gbps each
? Class C-S, subclass-1 compatible
? Internal AC coupling capacitors

? SYSREF Windowing for automatic SYSREF timing calibration

技術(shù)參數(shù)

  • 制造商編號(hào)

    :DDS39RF12

  • 生產(chǎn)廠家

    :TI

  • Number of DAC channels

    :2

  • Interface type

    :SPI

  • Sample/update rate (Msps)

    :24000

  • Features

    :Ultra High Speed

  • Rating

    :Catalog

  • Interpolation

    :128x

  • Power consumption (typ) (mW)

    :2800

  • SFDR (dB)

    :78

  • Architecture

    :Current Source

  • Operating temperature range (°C)

    :-40 to 85

  • Reference type

    :Ext

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