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首頁>CY7C1360A-150BGI>規(guī)格書詳情

CY7C1360A-150BGI中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書

CY7C1360A-150BGI
廠商型號

CY7C1360A-150BGI

功能描述

256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

文件大小

558.86 Kbytes

頁面數(shù)量

28

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡稱

CYPRESS賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識
CYPRESS
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-5 10:14:00

人工找貨

CY7C1360A-150BGI價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

CY7C1360A-150BGI規(guī)格書詳情

Functional Description

The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs integrate 262,144 ×36 and 524,288×18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE), depth-expansion Chip Enables (CE2and CE3), burst control inputs (ADSC, ADSP, and ADV), Write Enables (BWa, BWb, BWc, BWd, and BWE), and global Write (GW). However, the CE3chip enable input is only available for the TA package version.

特性 Features

? Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns

? Fast clock speed: 225, 200, 166, and 150 MHz

? Fast OEaccess times: 2.5 ns, 3.0 ns, and 3.5 ns

? Optimal for depth expansion (one cycle chip deselect to eliminate bus contention)

? 3.3V –5 and +10 power supply

? 3.3V or 2.5V I/O supply

? 5V-tolerant inputs except I/Os

? Clamp diodes to VSSat all inputs and outputs

? Common data inputs and data outputs

? Byte Write Enable and Global Write control

? Multiple chip enables for depth expansion: three chip enables for A package version and two chip enables for BG and AJ package versions

? Address pipeline capability

? Address, data, and control registers

? Internally self-timed Write Cycle

? Burst control pins (interleaved or linear burst sequence)

? Automatic power-down feature available using ZZ mode or CE deselect

? JTAG boundary scan for BG and AJ package version

? Low-profile 119-bump, 14-mm × 22-mm PBGA (Ball Grid Array) and 100-pin TQFP packages

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
CYPRESS
22+
TQFP
8000
原裝正品支持實(shí)單
詢價(jià)
CY
23+
QFP
9526
詢價(jià)
24+
N/A
64000
一級代理-主營優(yōu)勢-實(shí)惠價(jià)格-不悔選擇
詢價(jià)
Cypress
2022
QFP-100
2900
絕對現(xiàn)貨庫存 可長期供應(yīng) 可銷售樣品
詢價(jià)
CYPRESS(賽普拉斯)
24+
LQFP100
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
詢價(jià)
CYPRESS
2023+
QFP
50000
原裝現(xiàn)貨
詢價(jià)
CY
24+
QFP
9630
我們只做原裝正品現(xiàn)貨!量大價(jià)優(yōu)!
詢價(jià)
CYPR
23+
原廠正規(guī)渠道
5000
專注配單,只做原裝進(jìn)口現(xiàn)貨
詢價(jià)
CY
24+
QFP
20000
全新原廠原裝,進(jìn)口正品現(xiàn)貨,正規(guī)渠道可含稅??!
詢價(jià)
CYPRESS/賽普拉斯
23+
QFP
10000
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價(jià)格優(yōu)勢、品種
詢價(jià)