CY74FCT373ATSOC屬于集成電路（IC）的鎖存器。由美國德州儀器公司制造生產(chǎn)的CY74FCT373ATSOC鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲(chǔ)設(shè)備，但是不同之處在于，在鎖存使能（或類似命名）信號處于有效邏輯狀態(tài)的任何時(shí)間，保持的邏輯狀態(tài)都可以改變。“透明”鎖存器還允許設(shè)備輸出在鎖存使能信號有效時(shí)反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時(shí)改變。

Function and Pinout Compatible With FCT

and F Logic

Reduced VOH (Typically = 3.3 V) Versions

of Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

Ioff Supports Partial-Power-Down Mode

Operation

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

3-State Outputs

CY54FCT373T

– 32-mA Output Sink Current

– 12-mA Output Source Current

CY74FCT373T

– 64-mA Output Sink Current

– 32-mA Output Source Current

description

The ’FCT373T devices consist of eight latches with 3-state outputs for bus-organized applications. When the

latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup

times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE)

input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered

into the latches.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow through the device when it is powered down.