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CDCLVP2106

低抖動雙路 1:6 通用至 LVPECL 緩沖器; ? Dual 1:6 Differential Buffer\n? Two Clock Inputs\n? Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL\n? 12 LVPECL Outputs\n? Maximum Clock Frequency: 2 GHz\n? Maximum Core Current Consumption: 92 mA\n? Very Low Additive Jitter: RMS in 10-kHz to 20-MHz Offset Range\n? 2.375-V to 3.6-V Device Power Supply\n? Maximum Propagation Delay: 550 ps\n? Maximum Within Bank Output Skew: 20 ps\n? LVPECL Reference Voltage, VAC_REF, Available for Capacitive-Coupled Inputs\n? Industrial Temperature Range: –40°C to +85°C\n? Supports 105°C PCB Temperature (Measured with a Thermal Pad)\n? Available in 6-mm × 6-mm, 40-Pin VQFN (RHA) Package\n? ESD Protection Exceeds 2000 V (HBM);

The CDCLVP2106 is a highly versatile, low additive jitter buffer that can generate 12 copies of LVPECL clock outputs from two LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. Each buffer block consists of one input that feeds two LVPECL outputs. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 20 ps, making the device a perfect choice for use in demanding applications.\n\nThe CDCLVP2106 clock buffer distributes two clock inputs (IN0, IN1) to 12 pairs of differential LVPECL clock outputs (OUT0, OUT11) with minimum skew for clock distribution. Each buffer block consists of one input that feeds two LVPECL clock outputs. The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.\n\nThe CDCLVP2106 is specifically designed for driving 50-Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage (VAC_REF) should be applied to the unused negative input pin. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended.\n\nThe CDCLVP2106 is characterized for operation from ?40°C to +85°C and is available in a 6-mm × 6-mm, VQFN-40 package.

CDCLVP2106

12 LVPECL Output, High-Performance Clock Buffer

CDCLVP2106_16

12-LVPECL Output, High-Performance Clock Buffer

CDCLVP2106RHAR

12 LVPECL Output, High-Performance Clock Buffer

CDCLVP2106RHAR

12-LVPECL Output, High-Performance Clock Buffer

CDCLVP2106RHAT

12 LVPECL Output, High-Performance Clock Buffer

CDCLVP2106RHAT

12-LVPECL Output, High-Performance Clock Buffer

CDCLVP2106EVM

包裝：盒 功能：時鐘緩沖器 類別：開發(fā)板，套件，編程器 評估和演示板及套件 描述：EVAL MODULE FOR CDCLVP2106

CDCLVP2106RHAR

Package：40-VFQFN 裸露焊盤；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時鐘緩沖器，驅動器 描述：IC CLK BUFFER 1:12 2GHZ 40VQFN

CDCLVP2106RHAT

Package：40-VFQFN 裸露焊盤；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時鐘緩沖器，驅動器 描述：IC CLK BUFFER 1:12 2GHZ 40VQFN