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CDCLVP2104

低抖動(dòng)雙路 1:4 通用至 LVPECL 緩沖器; ? Dual 1:4 Differential Buffer\n? Two Clock Inputs\n? Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL\n? Eight LVPECL Outputs\n? Maximum Clock Frequency: 2 GHz\n? Maximum Core Current Consumption: 78 mA\n? Very Low Additive Jitter: RMS in 10-kHz to 20-MHz Offset Range\n? 2.375-V to 3.6-V Device Power Supply\n? Maximum Propagation Delay: 450 ps\n? Maximum 15 ps Within Bank Output Skew\n? LVPECL Reference Voltage, VAC_REF, Available for Capacitive-Coupled Inputs\n? Industrial Temperature Range: –40°C to +85°C\n? Supports 105°C PCB Temperature (Measured with a Thermal Pad)\n? Available in 5-mm × 5-mm, 28-Pin VQFN (RHD) Package\n? ESD Protection Exceeds 2000 V (HBM);

The CDCLVP2104 is a highly versatile, low additive jitter buffer that can generate eight copies of LVPECL clock outputs from two LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. Each buffer block consists of one input that feeds two LVPECL outputs. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 15 ps, making the device a perfect choice for use in demanding applications.\n\nThe CDCLVP2104 clock buffer distributes two clock inputs (IN0, IN1) to eight pairs of differential LVPECL clock outputs (OUT0, OUT7) with minimum skew for clock distribution. Each buffer block consists of one input that feeds two LVPECL clock outputs. The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.\n\nThe CDCLVP2104 is specifically designed for driving 50-Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage (VAC_REF) must be applied to the unused negative input pin. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended.\n\nThe CDCLVP2104 is characterized for operation from &3150;40°C to +85°C and is available in a 5-mm × 5-mm, QFN-28 package.

CDCLVP2104

Eight LVPECL Output, High-Performance Clock Buffer

CDCLVP2104_16

Eight-LVPECL Output, High-Performance Clock Buffer

CDCLVP2104RHDR

Eight-LVPECL Output, High-Performance Clock Buffer

CDCLVP2104RHDR

Eight LVPECL Output, High-Performance Clock Buffer

CDCLVP2104RHDT

Eight LVPECL Output, High-Performance Clock Buffer

CDCLVP2104RHDT

Eight-LVPECL Output, High-Performance Clock Buffer

CDCLVP2104EVM

包裝：盒 功能：時(shí)鐘緩沖器/驅(qū)動(dòng)器/接收器/轉(zhuǎn)換器 類別：開發(fā)板，套件，編程器 評(píng)估和演示板及套件 描述：EVAL MODULE FOR CDCLVP2104

CDCLVP2104RHDR

Package：28-VFQFN 裸露焊盤；包裝：卷帶（TR） 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC CLK BUFFER 2:8 2GHZ 28VQFN

CDCLVP2104RHDT

Package：28-VFQFN 裸露焊盤；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 時(shí)鐘緩沖器，驅(qū)動(dòng)器 描述：IC CLK BUFFER 2:8 2GHZ 28VQFN