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CDCB803

型號：CDCDB803ERSLT；Package：VQFN；CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 6

1Features ?8LP-HCSLoutputswithprogrammableintegrated 85-Ω(default)or100-Ωdifferentialoutput terminations ?8hardwareoutputenable(OE#)controls ?AdditivephasejitterafterPCIEGen6filter:20fs, RMS(maximum) ?AdditivephasejitterafterPCIEGen5filter:25fs, RMS(

CDCB803

型號：CDCDB803RSLR；Package：VQFN；CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 6

1Features ?8LP-HCSLoutputswithprogrammableintegrated 85-Ω(default)or100-Ωdifferentialoutput terminations ?8hardwareoutputenable(OE#)controls ?AdditivephasejitterafterPCIEGen6filter:20fs, RMS(maximum) ?AdditivephasejitterafterPCIEGen5filter:25fs, RMS(

CDCB803

型號：CDCDB803RSLT；Package：VQFN；CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 6

1Features ?8LP-HCSLoutputswithprogrammableintegrated 85-Ω(default)or100-Ωdifferentialoutput terminations ?8hardwareoutputenable(OE#)controls ?AdditivephasejitterafterPCIEGen6filter:20fs, RMS(maximum) ?AdditivephasejitterafterPCIEGen5filter:25fs, RMS(

CDCF2509

型號：CDCF2509PWR；Package：TSSOP；3.3-V PHASE-LOCK LOOP CLOCK DRIVER

UseCDCVF2509AasaReplacementfor thisDevice DesignedtoMeetPC133SDRAM RegisteredDIMMSpecificationRev.0.9 SpreadSpectrumClockCompatible OperatingFrequency25MHzto140MHz StaticPhaseErrorDistributionat66MHzto 133MHzis±125ps Jitter(cyc?cyc)at66MHzto133MHzI

CDCF2509

型號：CDCF2509PWR.B；Package：TSSOP；3.3-V PHASE-LOCK LOOP CLOCK DRIVER

UseCDCVF2509AasaReplacementfor thisDevice DesignedtoMeetPC133SDRAM RegisteredDIMMSpecificationRev.0.9 SpreadSpectrumClockCompatible OperatingFrequency25MHzto140MHz StaticPhaseErrorDistributionat66MHzto 133MHzis±125ps Jitter(cyc?cyc)at66MHzto133MHzI

CDCLVD2104

型號：CDCLVD2104RHDR；Package：VQFN；Dual 1:4 Low Additive Jitter LVDS Buffer

1FEATURES ?Dual1:4DifferentialBuffer ?LowAdditiveJitter

CDCLVD2104

型號：CDCLVD2104RHDR.A；Package：VQFN；Dual 1:4 Low Additive Jitter LVDS Buffer

1FEATURES ?Dual1:4DifferentialBuffer ?LowAdditiveJitter

CDCLVD2104

型號：CDCLVD2104RHDT；Package：VQFN；Dual 1:4 Low Additive Jitter LVDS Buffer

1FEATURES ?Dual1:4DifferentialBuffer ?LowAdditiveJitter

CDCLVD2104

型號：CDCLVD2104RHDT.A；Package：VQFN；Dual 1:4 Low Additive Jitter LVDS Buffer

1FEATURES ?Dual1:4DifferentialBuffer ?LowAdditiveJitter

CDCLVP110

型號：CDCLVP110MVFR；Package：LQFP；Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver

1FEATURES ?DistributesOneDifferentialClockInputPair LVPECL/HSTLto10DifferentialLVPECLClock Outputs ?FullyCompatibleWithLVECL/LVPECL/HSTL ?SingleSupplyVoltageRequired,±3.3-Vor ±2.5-VSupply ?SelectableClockInputThroughCLK_SEL ?Low-OutputSkew(Typ15ps)for Cloc