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首頁(yè)>CD74HC4538PWR.A>規(guī)格書詳情

CD74HC4538PWR.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

CD74HC4538PWR.A
廠商型號(hào)

CD74HC4538PWR.A

功能描述

High-Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator

絲印標(biāo)識(shí)

HJ4538

封裝外殼

TSSOP

文件大小

773.72 Kbytes

頁(yè)面數(shù)量

27 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI2德州儀器

中文名稱

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-3 20:00:00

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CD74HC4538PWR.A規(guī)格書詳情

特性 Features

? Retriggerable/Resettable Capability

? Trigger and Reset Propagation Delays Independent of

RX, CX

? Triggering from the Leading or Trailing Edge

? Q and Q Buffered Outputs Available

? Separate Resets

? Wide Range of Output Pulse Widths

? Schmitt Trigger Input on A and B Inputs

? Retrigger Time is Independent of CX

? Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

? Wide Operating Temperature Range . . . -55oC to 125oC

? Balanced Propagation Delay and Transition Times

? Significant Power Reduction Compared to LSTTL

Logic ICs

? HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

? HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

描述 Description

The ’HC4538 and ’HCT4538 are dual

retriggerable/resettable monostable precision multivibrators

for fixed voltage timing applications. An external resistor

(RX) and an external capacitor (CX) control the timing and

the accuracy for the circuit. Adjustment of RX and CX

provides a wide range of output pulse widths from the Q and

Q terminals. The propagation delay from trigger input-tooutput

transition and the propagation delay from reset inputto-

output transition are independent of RX and CX.

Leading-edge triggering (A) and trailing edge triggering (B)

inputs are provided for triggering from either edge of the

input pulse. An unused “A” input should be tied to GND and

an unused B should be tied to VCC. On power up the IC is

reset. Unused resets and sections must be terminated. In

normal operation the circuit retriggers on the application of

each new trigger pulse. To operate in the non-triggerable

mode Q is connected to B when leading edge triggering (A)

is used or Q is connected to A when trailing edge triggering

(B) is used. The period (τ) can be calculated from τ = (0.7)

RX, CX; RMIN is 5kΩ. CMIN is 0pF.

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
TI
25+
TSSOP-16
520
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TI(德州儀器)
2024+
TSSOP-16
500000
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Texas Instruments
23+
16-TSSOP
4500
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TI
2025+
TSSOP-16
16000
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TI/德州儀器
24+
SOIC-16
9600
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TI(德州儀器)
24+
TSSOP16
2886
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TexasInstruments
18+
ICMULTIVIBMONODUALHS16TS
6580
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詢價(jià)
TEXAS INSTRUMENTS
2022+
原廠原包裝
8600
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Texas Instruments(德州儀器)
22+
NA
500000
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TI
23+
16-SOIC
65600
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