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CD74HC297E

絲印：CD74HC297E；Package：PDIP；High-Speed CMOS Logic Digital Phase-Locked Loop

Features ?DigitalDesignAvoidsAnalogCompensationErrors ?EasilyCascadableforHigherOrderLoops ?UsefulFrequencyRange -K-Clock..........................DCto55MHz(Typ) -I/D-Clock....................DCto35MHz(Typ) ?DynamicallyV

CD74HC297E

High-Speed CMOS Logic Digital Phase-Locked Loop

CD74HC297E

High-Speed CMOS Logic Digital Phase-Locked Loop

CD74HC297E

Package：16-DIP（0.300"，7.62mm）；包裝：管件 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC DIGITAL PLL 16-DIP

CD74HC297E.A

絲?。?strong>CD74HC297E；Package：PDIP；High-Speed CMOS Logic Digital Phase-Locked Loop

Features ?DigitalDesignAvoidsAnalogCompensationErrors ?EasilyCascadableforHigherOrderLoops ?UsefulFrequencyRange -K-Clock..........................DCto55MHz(Typ) -I/D-Clock....................DCto35MHz(Typ) ?DynamicallyV

CD74HC297EE4

High-Speed CMOS Logic Digital Phase-Locked Loop

CD74HC297EG4

Package：16-DIP（0.300"，7.62mm）；包裝：管件 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC DIGITAL PHASE-LOCKD LOOP 16-D