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CD74HC138

HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

QualifiedforAutomotiveApplications SelectOneofEightDataOutputsActive Low I/OPortorMemorySelector ThreeEnableInputstoSimplifyCascading TypicalPropagationDelayof13nsat VCC=5V,CL=15pF,TA=25
C Fanout(OverTemperatureRange) ?StandardOutputs...10LSTTLL

CD74HC138

高速 CMOS 邏輯 3 至 8 線路解碼器多路解復(fù)用器（反向和同向）; ? Select One Of Eight Data Outputs Active Low for 138, Active High for 238\n? I/O Port or Memory Selector\n? Three Enable Inputs to Simplify Cascading\n? Typical Propagation Delay of 13ns at VCC = 5V, CL = 15pF, TA = 25°C\n? Fanout (Over Temperature Range) \n? Standard Outputs . . . . 10 LSTTL Loads\n? Bus Driver Outputs . . . . 15 LSTTL Loads\n \n? Wide Operating Temperature Range . . . –55°C to 125°C\n? Balanced Propagation Delay and Transition Times\n? Significant Power Reduction Compared to LSTTL Logic ICs\n? HC Types \n? 2V to 6V Operation\n? High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V\n \n? HCT Types \n? 4.5V to 5.5V Operation\n? Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)\n? CMOS Input Compatibility, Il 1μA at VOL, VOH\n \n Data sheet acquired from Harris Semiconductor;

The ?HC138, ?HC238, ?HCT138, and ?HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. Both circuits have three binary select inputs (A0, A1 and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC/HCT138 series will go low or which of the normally low outputs of the HC/HCT238 series will go high.\n\n Two active low and one active high enables (E1\\, E2\\, and E3) are provided to ease the cascading of decoders. The decoder?s 8 outputs can drive 10 low power Schottky TTL equivalent loads.

CD74HC138

High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer Inverting and Non-Inverting

CD74HC138

High-Speed CMOS Logic 3- to 8-Line Decoder/ Demultiplexer Inverting and Noninverting

CD74HC138

High-Speed CMOS Logic 3- to 8-Line Decoder/ Demultiplexer Inverting and Noninverting

CD74HC138

High-Speed CMOS Logic 3- to 8-Line Decoder/ Demultiplexer Inverting and Noninverting

CD74HC138-Q1

汽車類高速 CMOS 邏輯 3 至 8 線解碼器多路解復(fù)用器（反向和同向）; ? Qualified for Automotive Applications\n? Select One of Eight Data Outputs Active Low\n? I/O Port or Memory Selector\n? Three Enable Inputs to Simplify Cascading\n? Typical Propagation Delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C\n? Fanout (Over Temperature Range) \n? Standard Outputs . . . 10 LSTTL Loads\n? Bus Driver Outputs . . . 15 LSTTL Loads\n \n? Balanced Propagation Delay and Transition Times\n? Significant Power Reduction Compared to LSTTL Logic ICs\n? 2-V to 6-V VCC Operation\n? High Noise Immunity; NIL or NIH = 30% of VCC, VCC = 5 V;

The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low. Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder?s eight outputs can drive ten low-power Schottky TTL equivalent loads.

CD74HC138-Q1

HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

QualifiedforAutomotiveApplications SelectOneofEightDataOutputsActive Low I/OPortorMemorySelector ThreeEnableInputstoSimplifyCascading TypicalPropagationDelayof13nsat VCC=5V,CL=15pF,TA=25
C Fanout(OverTemperatureRange) ?StandardOutputs...10LSTTLL

CD74HC138QM96Q1

絲?。?a target="_blank" title="Marking" href="/hc138q/marking.html">HC138Q；Package：SOIC；HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

QualifiedforAutomotiveApplications SelectOneofEightDataOutputsActive Low I/OPortorMemorySelector ThreeEnableInputstoSimplifyCascading TypicalPropagationDelayof13nsat VCC=5V,CL=15pF,TA=25
C Fanout(OverTemperatureRange) ?StandardOutputs...10LSTTLL

CD74HC138QM96Q1.A

絲?。?a target="_blank" title="Marking" href="/hc138q/marking.html">HC138Q；Package：SOIC；HIGH-SPEED CMOS LOGIC 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

QualifiedforAutomotiveApplications SelectOneofEightDataOutputsActive Low I/OPortorMemorySelector ThreeEnableInputstoSimplifyCascading TypicalPropagationDelayof13nsat VCC=5V,CL=15pF,TA=25
C Fanout(OverTemperatureRange) ?StandardOutputs...10LSTTLL